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2022-05-19Move ebreak* logic from take_trap into instructions. (#1006)Tim Newsome1-1/+8
Now that logic only affects ebreak instructions, and does not affect triggers that also cause a trap to be taken. Fixes #725. Although like Paul, I don't have a test for this case. Introduce trap_debug_mode so so ebreak instructions can force entry into debug mode.
2021-11-04Report proper GVA bit on breakpoint trapsScott Johnson1-1/+1
2021-11-04Add gva field to trap_breakpointScott Johnson1-1/+1
So I can fix breakpoints next to properly report gva.
2020-10-17fixed mtval update for breakpoint instructions (#573)Neel Gala1-1/+1
Co-authored-by: Neel Gala <neelgala@incoresemi.com>
2020-07-08Extend trap classes to pass more informationAnup Patel1-1/+1
With hypervisor extension, we have more CSRs providing trap related information. We extend existing trap classes to pass additional trap information required by hypervisor extension. Signed-off-by: Anup Patel <anup.patel@wdc.com>
2020-03-20ebreak should write mtval with 0, not pcAndrew Waterman1-1/+1
Resolves #426 The relevant passage in the spec does not mention software breakpoints as one of the cases that cause mtval to be set to a nonzero value: https://github.com/riscv/riscv-isa-manual/blob/274893e2f0365f904829bbb60fd05cc01d2bfb11/src/machine.tex#L2202
2017-03-27On EBREAK, set badaddr to pcAndrew Waterman1-1/+1
2016-04-19Split ERET into URET, SRET, HRET, MRETAndrew Waterman1-0/+1