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rocket-tools/riscv-gnu-toolchain/spike.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speedup-hacks
static-link
test
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sifive/rvv0.9-phase2
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execute.cc
Age
Commit message (
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Author
Files
Lines
2021-11-04
Report proper GVA bit on breakpoint traps
Scott Johnson
1
-1
/
+1
2021-11-04
Add gva field to trap_breakpoint
Scott Johnson
1
-1
/
+1
2021-11-03
Use appropriate subclass for breakpoint trap
Scott Johnson
1
-1
/
+1
2021-09-29
Convert vl to csr_t
Scott Johnson
1
-1
/
+1
2021-09-26
Convert dcsr to csr_t
Scott Johnson
1
-1
/
+1
2021-09-16
Convert minstret to csr_t
Scott Johnson
1
-1
/
+1
2021-07-28
Inline execute_insn
Andrew Waterman
1
-1
/
+1
2021-07-17
commitlog: add toggle for wfi
Chih-Min Chao
1
-1
/
+3
2021-06-02
Remove Duff's Device in main simulation loop (#721)
Andrew Waterman
1
-43
/
+12
2021-02-09
Fix commit log for WFI instructions
Andrew Waterman
1
-0
/
+3
2021-01-27
Increment minstret when WFI completes (#636)
Scott Johnson
1
-1
/
+1
2020-10-26
commitlog: fix compilation warning
Chih-Min Chao
1
-1
/
+1
2020-10-06
rvv: commitlog: get hartid directly
Chih-Min Chao
1
-2
/
+1
2020-09-29
Adding symbol lookup when --enable-commitlog is enabled (#558)
sthiruva
1
-0
/
+5
2020-09-28
Add core id to lines generated by --log-commits (#556)
sthiruva
1
-0
/
+4
2020-07-08
Extend trap classes to pass more information
Anup Patel
1
-1
/
+1
2020-07-02
commitlog: support csr access
Chih-Min Chao
1
-1
/
+5
2020-07-02
commitlog: simplify print_value path
Chih-Min Chao
1
-26
/
+27
2020-07-02
commitlog: extend hint bit to record csr access
Chih-Min Chao
1
-2
/
+6
2020-06-17
rvv: commitlog: fix fractional lmul dump
Chih-Min Chao
1
-2
/
+2
2020-06-04
rvv: fix compilation warning
Chih-Min Chao
1
-1
/
+1
2020-05-28
rvv: extenc VU structure to support 0.9 new fields
Chih-Min Chao
1
-1
/
+5
2020-05-26
Report haltgroup halt cause, per the debug spec. (#473)
Tim Newsome
1
-1
/
+3
2020-04-29
rvv: commitlog: report status when memory trap occurs in vector load/store
Chih-Min Chao
1
-6
/
+25
2020-03-27
Write execution logs to a named log file (#409)
Rupert Swarbrick
1
-27
/
+37
2020-03-23
commitlog: fix wrong dump when exception occurs
Chih-Min Chao
1
-7
/
+14
2020-03-09
commitlog: enhance vector dump
Chih-Min Chao
1
-5
/
+14
2020-02-20
commitlog: print vsew in bit
Chih-Min Chao
1
-1
/
+1
2020-02-18
commitlog: fix printf format warning
Chih-Min Chao
1
-1
/
+1
2020-01-22
commitlog: extend reg record to keep multiple accesss
Chih-Min Chao
1
-15
/
+55
2020-01-13
commitlog: extend load/store record to keep multiple access
Chih-Min Chao
1
-7
/
+9
2019-12-16
extend the commit and memory writes log feature with memory reads (#370)
John Ingalls
1
-5
/
+11
2019-09-18
Extends the commit log feature with memory writes. (#324)
dave-estes-syzexion
1
-5
/
+14
2019-09-18
Adds --log-commits commandline option. (#323)
dave-estes-syzexion
1
-1
/
+3
2019-07-12
Add debug_mode state bit, rather than overloading dcsr.cause
Andrew Waterman
1
-3
/
+3
2019-06-18
rvv: extend interactive debug
Chih-Min Chao
1
-1
/
+0
2019-04-02
Implement debug hasel support (#287)
Tim Newsome
1
-7
/
+10
2018-08-10
Fix 2 trigger corner cases. (#229)
Tim Newsome
1
-3
/
+5
2018-04-30
Fix commit log for serializing instructions
Andrew Waterman
1
-1
/
+1
2018-04-30
Only break out of the simulator loop on WFI, not on CSR writes
Andrew Waterman
1
-1
/
+2
2018-03-21
Implement Hauser misa.C misalignment proposal (#187)
Andrew Waterman
1
-1
/
+0
2018-03-09
Fix single stepping csrrw instructions (#178)
Tim Newsome
1
-8
/
+7
2018-03-06
Narrow the interface used by the processors and memory to the top-level simul...
Prashanth Mundkur
1
-1
/
+0
2018-03-03
Implement clearing-misa.C-while-PC-is-misaligned proposal
Andrew Waterman
1
-0
/
+1
2018-02-21
Don't allow 32-bit instructions to take up multiple slots in I$
Andrew Waterman
1
-16
/
+2
2017-12-11
Make progbuf a run-time option.
Tim Newsome
1
-3
/
+1
2017-11-20
Fix commitlog. (#162)
Christopher Celio
1
-5
/
+8
2017-10-20
Fix commit-log for Q extension, and for RV32 (#143)
Andrew Waterman
1
-15
/
+42
2017-09-21
Fix comment typo. (#126)
Tim Newsome
1
-1
/
+1
2017-04-18
debug: Checkpoint which somewhat works with OpenOCD v13, but still has some b...
Megan Wachs
1
-5
/
+8
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