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decode.h
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Author
Files
Lines
2019-10-28
Implement support for big-endian hosts
Marcus Comstedt
1
-16
/
+23
2019-10-22
Stop loading "past the end" of the vector. (#351)
Nick Knight
1
-5
/
+5
2019-07-19
Check vtype.vill for all vector instructions except vsetvl[i]
Andrew Waterman
1
-7
/
+14
2019-07-11
Fix support for 32-bit hosts (but no V extension in that case!)
Andrew Waterman
1
-0
/
+3
2019-07-05
Avoid static initializers for variable-length arrays
Andrew Waterman
1
-2
/
+2
2019-06-18
rvv: add floating-point instructions
Chih-Min Chao
1
-1
/
+264
2019-06-18
rvv: add load/store instructions
Chih-Min Chao
1
-0
/
+151
2019-06-18
rvv: add integer/fixed-point/mask/reduction/permutation instructions
Chih-Min Chao
1
-0
/
+1041
2019-06-18
rvv: add control instructions and system register access
Chih-Min Chao
1
-0
/
+1
2019-06-14
rvv: disasm: add v-spec 0.7.1 support
Chih-Min Chao
1
-0
/
+10
2019-04-02
Implement debug hasel support (#287)
Tim Newsome
1
-0
/
+3
2018-08-23
Fix several disassembler bugs
Andrew Waterman
1
-0
/
+1
2018-04-30
Only break out of the simulator loop on WFI, not on CSR writes
Andrew Waterman
1
-0
/
+6
2018-03-21
Implement Hauser misa.C misalignment proposal (#187)
Andrew Waterman
1
-1
/
+1
2018-03-03
Implement clearing-misa.C-while-PC-is-misaligned proposal
Andrew Waterman
1
-3
/
+3
2017-10-20
Fix commit-log for Q extension, and for RV32 (#143)
Andrew Waterman
1
-2
/
+2
2017-09-28
Implement Q extension
Andrew Waterman
1
-11
/
+32
2017-04-19
Fix builds with "--enable-commitlog"
Palmer Dabbelt
1
-1
/
+1
2017-04-18
debug: Use Debug-Module specific constants instead of global defines.
Megan Wachs
1
-13
/
+0
2017-04-18
debug: Checkpoint which somewhat works with OpenOCD v13, but still has some b...
Megan Wachs
1
-8
/
+5
2017-04-17
debug: Move things around, but addresses now conflict with ROM.
Megan Wachs
1
-8
/
+13
2017-04-17
Merge remote-tracking branch 'origin/priv-1.10' into HEAD
Megan Wachs
1
-10
/
+31
2017-04-10
Implement new FP encoding
Andrew Waterman
1
-5
/
+21
2017-03-27
Set badaddr=0 on illegal instruction traps
Andrew Waterman
1
-3
/
+3
2017-03-23
Require little-endian host
Andrew Waterman
1
-0
/
+4
2017-02-20
serialize simulator on wfi
Andrew Waterman
1
-2
/
+3
2017-02-13
Abstract register read mostly working.
Tim Newsome
1
-3
/
+9
2017-02-10
Entering debug mode now jumps to "dynamic rom"
Tim Newsome
1
-10
/
+6
2016-06-01
Move sethaltnot and cleardebint.
Tim Newsome
1
-2
/
+2
2016-05-24
Move cleardebint, per spec.
Tim Newsome
1
-1
/
+1
2016-05-23
Remove dependency on include file in my homedir.
Tim Newsome
1
-5
/
+0
2016-05-23
Software breakpoints sort of work.
Tim Newsome
1
-6
/
+0
2016-05-23
Exceptions in Debug Mode, stay in Debug Mode.
Tim Newsome
1
-0
/
+1
2016-05-23
Have Debug memory kind of working again.
Tim Newsome
1
-6
/
+6
2016-05-23
Add debug_module bus device.
Tim Newsome
1
-3
/
+6
2016-05-23
Make sure to translate Debug RAM addresses also.
Tim Newsome
1
-0
/
+3
2016-05-23
Clean up how Debug ROM is included.
Tim Newsome
1
-1
/
+1
2016-05-23
Can jump to and execute Debug ROM.
Tim Newsome
1
-2
/
+5
2016-05-23
When gdb connects, jump to Debug ROM and segfault.
Tim Newsome
1
-1
/
+6
2016-05-23
Gutting direct-access gdb.
Tim Newsome
1
-0
/
+4
2016-05-23
Add writing to DCSR, DPC, DSCRATCH.
Tim Newsome
1
-0
/
+5
2016-05-21
Some bugfixes for CSR reading and setting FS for fflags updates (#43)
Andy Wright
1
-1
/
+4
2016-03-02
Fix ERET serialization strategy
Andrew Waterman
1
-3
/
+6
2016-03-02
Serialize simulator on ERET
Andrew Waterman
1
-0
/
+6
2016-03-02
WIP on priv spec v1.9
Andrew Waterman
1
-3
/
+2
2016-03-01
Upgrade to latest SoftFloat
Andrew Waterman
1
-0
/
+4
2015-11-12
Generate device tree for target machine
Andrew Waterman
1
-0
/
+1
2015-11-12
Access FP regs through a macro
Andrew Waterman
1
-5
/
+6
2015-10-05
more work towards RVC 1.8
Andrew Waterman
1
-4
/
+3
2015-10-02
work towards rvc 1.8
Andrew Waterman
1
-0
/
+3
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