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path: root/riscv/debug_module.cc
AgeCommit message (Expand)AuthorFilesLines
2022-10-07Add --dm-no-abstract-fpr option.Tim Newsome1-1/+1
2022-08-10Add space between if/while/switch and '('Weiwei Li1-1/+1
2022-08-10Fix code indentation in processor.cc, interactive.cc, debug_module.h/ccWeiwei Li1-29/+29
2022-07-25Pay attention to dmcs2.grouptype. (#1049)Tim Newsome1-1/+3
2022-03-07Update debug_defines.h (#942)Tim Newsome1-116/+116
2022-01-09Changes to be cleaner wrt. -WextraAndrew Waterman1-5/+5
2022-01-06Don't say "master" (#898)Tim Newsome1-14/+14
2021-08-03declare socket properties in sim_tElmar Melcher1-1/+1
2020-12-13Preserve abstract s0 write if progbuf excepts. (#615)Tim Newsome1-0/+11
2020-08-20Fix debug tests failing with impebreak enabled. (#530)Tim Newsome1-1/+1
2020-08-11Add option to dissable implicit ebreak in program bufferSamuel Obuch1-6/+9
2020-05-26Report haltgroup halt cause, per the debug spec. (#473)Tim Newsome1-3/+3
2020-04-09op: update CSRChih-Min Chao1-6/+6
2020-03-30Assert that debug_module is initialized correctly. (#437)Tim Newsome1-0/+1
2020-03-05Make debug printfs only show in debug builds. (#414)Andrew Waterman1-6/+6
2020-02-21Initialize some uninitialized stateAndrew Waterman1-1/+2
2019-07-16Writing non-existent CSRs, access FPRs with mstatus.FS=0 (#311)Tim Newsome1-2/+32
2019-05-14Clean up debug module options. (#299)Tim Newsome1-38/+31
2019-04-04Add --debug-no-abstract-csr (#267)Tim Newsome1-7/+4
2019-04-02Implement debug hasel support (#287)Tim Newsome1-60/+114
2019-03-04Implement halt groups (#280)Tim Newsome1-17/+59
2019-01-09Merge pull request #265 from riscv/debug_testTim Newsome1-2/+15
2018-12-13Add --dmi-rti and --abstract-rti to test OpenOCD.Tim Newsome1-2/+15
2018-12-03Correct address autoincrement calls. (#263)Tim Newsome1-2/+5
2018-09-05Fix cut-and-paste bug in 64-bit SBA loads.Tim Newsome1-1/+1
2018-08-23Add dummy custom debug registers, to test OpenOCD. (#233)Tim Newsome1-0/+15
2018-06-11Update debug_defines.hTim Newsome1-4/+7
2018-05-31Put simif_t declaration in its own file. (#209)Andy Wright1-0/+1
2018-03-16Implement debug havereset bitsTim Newsome1-0/+14
2018-03-07Merge pull request #177 from riscv/debug_authTim Newsome1-2/+28
2018-03-06Fix install of a missed header from debug_rom.Prashanth Mundkur1-1/+1
2018-02-27Add debug module authentication.Tim Newsome1-2/+28
2018-02-19Passes smoke tests with --progsize=0Tim Newsome1-15/+82
2018-02-19WIP. Doesn't work.Tim Newsome1-39/+35
2018-02-01Add --debug-sba optionTim Newsome1-47/+38
2018-01-29Update debug_definesTim Newsome1-3/+5
2018-01-18Support debug system bus access.Tim Newsome1-14/+177
2017-12-11Set impebreak.Tim Newsome1-1/+8
2017-12-11Update to latest debug_defines.h.Tim Newsome1-13/+13
2017-12-11Make progbuf a run-time option.Tim Newsome1-4/+16
2017-09-21Actually let hartreset be set.Tim Newsome1-0/+1
2017-09-21Fix debug reset.Tim Newsome1-1/+7
2017-08-28Add a nice debug printf for debug_module_t::storeTim Newsome1-1/+13
2017-08-11Turn off debug module debug printfs.Tim Newsome1-2/+2
2017-08-07Fix multicore debug.Tim Newsome1-10/+10
2017-06-09Return success on writes to abstractautoTim Newsome1-3/+5
2017-05-15Better error message when doing DMI operations and we're busyPalmer Dabbelt1-2/+10
2017-04-26Handle abstractcs.busyPalmer Dabbelt1-8/+10
2017-04-26Have ndmreset reset the processorPalmer Dabbelt1-0/+3
2017-04-18debug: Able to successfully examine a single hart.Megan Wachs1-1/+3
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