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path: root/riscv/csrs.h
AgeCommit message (Expand)AuthorFilesLines
2022-10-04Suppress most unused variable warningsAndrew Waterman1-1/+1
2022-10-04Fix remaining ignored-qualifiers warningAndrew Waterman1-1/+1
2022-09-20Merge pull request #1036 from plctlab/plct-sscofpmf-devAndrew Waterman1-0/+9
2022-08-11Unify PMPCFGx behaviour with PMPADDRx where PMP is disabled (#1068)Greg Chadwick1-0/+1
2022-08-09add support for sscofpmf extension v0.5.2Weiwei Li1-0/+9
2022-08-08Merge pull request #1059 from plctlab/plct-stateen-fixAndrew Waterman1-6/+0
2022-08-03Add Sstc support. (#1057)i2h21-1/+16
2022-08-03add stateen related check to frm/fflags and then apply to fcsr implicitlyWeiwei Li1-6/+0
2022-07-21Merge pull request #1040 from plctlab/plct-priv-devAndrew Waterman1-7/+10
2022-07-21add support for time/timeh/htimedelta/htimedeltah csrsWeiwei Li1-0/+15
2022-07-21modify minstret/mcycle/minstreth/mcycleh to reuse rv32_low/high_csr_tWeiwei Li1-14/+2
2022-07-18Merge pull request #1041 from plctlab/plct-new-csrsAndrew Waterman1-0/+1
2022-07-17extract the progress of computing the inital value of mstatus intoWeiwei Li1-0/+1
2022-07-15Merge pull request #1043 from YenHaoChen/pr-conditionalize-epmpAndrew Waterman1-0/+1
2022-07-13Add proxy for accessing the low 32 bits of a 64-bit CSRScott Johnson1-0/+15
2022-07-13Remove no-longer-needed mask from rv32_high_csr_tScott Johnson1-1/+0
2022-07-13Remove unnecessary mask from rv32_high_csr_t constructorScott Johnson1-2/+2
2022-07-13Add verify_permissions() for mseccfg_csr_tYenHaoChen1-0/+1
2022-07-09add smstateen check for fcsr, senvcfg, henvcfgWeiwei Li1-0/+4
2022-07-09add standalone class for fcsr and senvcfg csrWeiwei Li1-0/+11
2022-07-09add support for csrs of smstateen extensionsWeiwei Li1-0/+19
2022-07-07modify mstatush_csr_t to general rv32_high_csr_tWeiwei Li1-4/+6
2022-07-07remove multi blank linesWeiwei Li1-37/+0
2022-05-11Change henvcfg csr to a henvcfg_csr_tRyan Buchner1-0/+14
2022-05-04Implement the new csr mseccfg for ePMP as dummysoberl@nvidia.com1-0/+16
2022-04-11Merge pull request #944 from riscv-software-src/triggersScott Johnson1-4/+1
2022-04-04Refactor misa maskingMark Fedorov1-0/+1
2022-03-30Move tdata2 into mcontrol_tTim Newsome1-4/+1
2022-03-16Inline most implicit accesses to fflags/frmAndrew Waterman1-1/+3
2022-03-15Rewrite sstatus_csr_t::enabled() for higher performanceAndrew Waterman1-2/+5
2022-03-15Give concrete types to fields of sstatus_proxy_csr_tAndrew Waterman1-2/+2
2022-03-15Give concrete types to fields of sstatus_csr_tAndrew Waterman1-3/+4
2022-03-15Allow sstatus_proxy_csr_t::read() to be inlinedAndrew Waterman1-2/+6
2022-03-15Allow mstatus_csr_t::read() to be inlinedAndrew Waterman1-2/+6
2022-03-15Allow vsstatus_csr_t::read() to be inlinedAndrew Waterman1-2/+6
2022-03-15Move sstatus_proxy_csr_t defn below that of mstatus_csr_tAndrew Waterman1-11/+11
2022-03-15Fix perf regression from CSR refactoring (#949)Andrew Waterman1-3/+13
2022-02-18Split out MINSTRET and MCYCLERupert Swarbrick1-4/+4
2022-02-18Rename minstret CSR classes to something more generalRupert Swarbrick1-7/+7
2021-11-13Use enum to specify the 3 options for masking of intr CSRsScott Johnson1-2/+3
2021-11-13Mask hideleg by midelegScott Johnson1-0/+9
2021-11-02Zbkx renames xperm.n and xperm.b as xperm4 and xperm8. (#846)Markku-Juhani O. Saarinen1-2/+2
2021-10-15Fix clang warningAndrew Waterman1-1/+1
2021-10-06Make vxsat into its own classScott Johnson1-0/+8
2021-10-06Let each sstatus CSR determine extension enableScott Johnson1-0/+2
2021-10-06Give sstatus_csr_t handles to its base_status_csr_t constituentsScott Johnson1-1/+6
2021-09-29Convert vlenb to csr_tScott Johnson1-1/+1
2021-09-29Convert vstart to csr_tScott Johnson1-0/+5
2021-09-29Convert vxsat to csr_tScott Johnson1-0/+11
2021-09-28Convert sentropy to csr_tScott Johnson1-0/+11
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