| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2022-07-21 | add support for time/timeh/htimedelta/htimedeltah csrs | Weiwei Li | 1 | -0/+1 | |
| 2021-09-08 | Convert mip to csr_t family | Scott Johnson | 1 | -5/+5 | |
| This changes the commitlog of `csrw sip` so that it only logs a change to `mip`, instead of both `mip` and `sip`. This is arguably preferable, since there is no real `sip` register -- it is only a view into `mip`. It also adds proper tracing of the modification to `mip` when doing `csrw` to `hip`, `hvip`, and `vsip`, which were all missing previously. | |||||
| 2020-02-15 | Make CLINT API use Hz instead of MHz | Andrew Waterman | 1 | -3/+3 | |
| 2020-02-15 | Add optional support for real-time clint | Anup Patel | 1 | -3/+20 | |
| This patch adds optional support clint timer incrementing at real-time rate. This can be enabled by passing command line parameter "--real-time-clint". This feature can be used for: 1. Checking whether any code addition to Spike is slowing down simulation too much 2. Comparing run-time for software on Spike with other functional simulators (such as QEMU) Signed-off-by: Anup Patel <anup.patel@wdc.com> | |||||
| 2019-11-27 | Initialize mtime | Andrew Waterman | 1 | -1/+1 | |
| Closes #363 | |||||
| 2017-03-22 | riscv: replace rtc device with a real clint implementation | Wesley W. Terpstra | 1 | -0/+72 | |
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index : rocket-tools/riscv-gnu-toolchain/spike.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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