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:
rocket-tools/riscv-gnu-toolchain/spike.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
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hwacha
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Files
Lines
2015-02-08
Use xlen, not xprlen, to refer to x-register width
Andrew Waterman
2
-4
/
+4
2014-12-20
Support building from within root directory
Andrew Waterman
1
-1
/
+1
2014-12-20
Fix makefile race condition
Andrew Waterman
1
-0
/
+3
2014-12-05
zero-extend 32b instructions for vxcptaux
Andrew Waterman
2
-6
/
+6
2014-12-04
Support 2/4/6/8-byte instructions
Andrew Waterman
1
-2
/
+2
2014-11-25
Factor out the dummy RoCC accelerator
Andrew Waterman
2
-0
/
+3
2014-09-27
Avoid use of __int128_t
Andrew Waterman
1
-0
/
+1
2014-07-07
Use precompiled headers to speed up compilation
Andrew Waterman
6
-19
/
+20
2014-04-03
Sync encoding in opcodes
Stephen Twigg
1
-152
/
+153
2014-04-03
Add ut_fclass_s/d hwacha (unused until encoding sync)
Stephen Twigg
2
-0
/
+2
2014-03-02
add hwacha vfmsv instructions
Yunsup Lee
5
-5
/
+12
2014-02-03
Move half precision instructions, add vfmsv, vfmvv
Quan Nguyen
48
-137
/
+265
2014-01-31
Fix linking on Darwin
Andrew Waterman
1
-2
/
+0
2014-01-20
Merge branch 'confprec'
Quan Nguyen
45
-0
/
+353
2013-12-17
Speed things up quite a bit
Andrew Waterman
1
-1
/
+1
2013-11-29
Remove debug printf in vsetprec
confprec
Quan Nguyen
1
-1
/
+0
2013-11-29
Add vsetprec instruction prototype
Quan Nguyen
5
-0
/
+17
2013-11-25
Update to new privileged ISA
Andrew Waterman
1
-3
/
+0
2013-11-24
Merge branch 'master' of github.com:ucb-bar/riscv-isa-sim into HEAD
Quan Nguyen
2
-2
/
+3
2013-11-21
fix slli/slliw encoding bug
Yunsup Lee
1
-2
/
+2
2013-11-05
correctly trap when SR_EA is disabled
Yunsup Lee
1
-0
/
+1
2013-11-04
Fix declaration of half-precision instructions
Albert Ou
2
-0
/
+2
2013-11-04
Re-add Hwacha header file
Albert Ou
1
-0
/
+1
2013-11-04
Implement "half-baked" half-precision instruction subset for Hwacha
Albert Ou
39
-2
/
+336
2013-10-28
include stdexcept
Yunsup Lee
1
-0
/
+1
2013-10-21
clarify vxcptsave/vxctkill semantics
Yunsup Lee
3
-3
/
+7
2013-10-18
implement vxcptsave/vxcptrestore
Yunsup Lee
4
-3
/
+82
2013-10-18
more hwacha supervisor stuff
Yunsup Lee
6
-17
/
+21
2013-10-18
refactor disassembler, and add hwacha disassembler
Yunsup Lee
5
-5
/
+223
2013-10-18
can't execute frsr/fssr on ut
Yunsup Lee
3
-4
/
+0
2013-10-18
or into control thread's fp exceptions
Yunsup Lee
1
-4
/
+0
2013-10-17
catch trap_illegal_instruction in hwacha
Yunsup Lee
1
-0
/
+4
2013-10-17
add hwacha exception support
Yunsup Lee
13
-24
/
+209
2013-10-16
fix maxvl calc logic
Yunsup Lee
1
-1
/
+5
2013-10-16
use reset virtual method
Yunsup Lee
2
-3
/
+4
2013-10-16
use uint32_t for vl
Yunsup Lee
1
-1
/
+1
2013-10-16
revamp hwacha; now runs in physical mode
Yunsup Lee
242
-259
/
+662
2013-07-26
Remove more vector stuff
Andrew Waterman
1
-0
/
+49
2013-07-26
Rip out Hwacha for now
Andrew Waterman
92
-0
/
+219