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path: root/debug_rom/debug_rom.h
AgeCommit message (Expand)AuthorFilesLines
2019-07-16Writing non-existent CSRs, access FPRs with mstatus.FS=0 (#311)Tim Newsome1-9/+9
2019-04-02Implement debug hasel support (#287)Tim Newsome1-8/+9
2017-04-18debug: Add fence and fence.i to ensure Debug RAM is ready.Megan Wachs1-4/+5
2017-04-17debug: Use a more practical debug ROMMegan Wachs1-14/+9
2016-09-02Rebuild debug ROM because CSR encoding changed.Tim Newsome1-2/+2
2016-06-22Parameterize debug ROM contents on XLENAndrew Waterman1-14/+11
2016-06-09Fix 2 bugs in Debug ROM: (#52)Tim Newsome1-5/+5
2016-06-03DCSR cause was moved, bug debug ROM wasn't updatedTim Newsome1-1/+1
2016-06-01Move sethaltnot and cleardebint.Tim Newsome1-2/+2
2016-05-24New encoding.h for new CSR addresses.Tim Newsome1-4/+4
2016-05-24Move cleardebint, per spec.Tim Newsome1-2/+2
2016-05-23Change DCSR bits to match spec.Tim Newsome1-3/+3
2016-05-23Use fence.i in Debug ROM.Tim Newsome1-9/+9
2016-05-23Add dret.Tim Newsome1-1/+1
2016-05-23Implement single memory read access.Tim Newsome1-16/+17
2016-05-23Exceptions in Debug Mode, stay in Debug Mode.Tim Newsome1-15/+16
2016-05-23Have Debug memory kind of working again.Tim Newsome1-8/+8
2016-05-23Fix race using fence.Tim Newsome1-16/+15
2016-05-23processor_t unfriends gdbserver_t.Tim Newsome1-1/+1
2016-05-23Add debug_module bus device.Tim Newsome1-4/+4
2016-05-23ROM -> RAM -> ROM, waiting for debug int.Tim Newsome1-1/+1
2016-05-23Jump to the correct (temporary) Debug RAM address.Tim Newsome1-5/+5
2016-05-23Clean up how Debug ROM is included.Tim Newsome1-0/+18