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rocket-tools/riscv-gnu-toolchain/spike.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
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speedup-hacks
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test
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sifive/rvv0.9-phase2
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Author
Files
Lines
2021-06-02
Remove Duff's Device in main simulation loop (#721)
Andrew Waterman
3
-58
/
+12
2021-06-02
Accept Zba, Zbb, Zbc, Zbs ISA strings
Andrew Waterman
46
-45
/
+85
2021-06-02
Fix ambiguous if/else warning
Andrew Waterman
1
-1
/
+1
2021-06-02
Fix CSR read-only check regression introduced in 463001198
Andrew Waterman
1
-1
/
+5
2021-05-25
Add alignment check for lr instruction (#713)
sven
3
-3
/
+6
2021-05-20
Don't raise virtual instruction exceptions writes to read-only registers
Andrew Waterman
1
-2
/
+1
2021-05-17
Implement satp/vsatp WARLness correctly
Andrew Waterman
2
-33
/
+36
2021-05-17
Enforce hgatp WARLness in concordance with the spec
Andrew Waterman
1
-9
/
+15
2021-05-10
Support RISC-V p-ext-proposal v0.9.2 (#637)
ChunPing Chung
334
-1
/
+4228
2021-05-08
in get_csr, use ret macro instead of return statement
Andrew Waterman
1
-2
/
+2
2021-05-01
Improve coding style of logging printfs
Andrew Waterman
4
-21
/
+16
2021-05-01
Fix compiler warning (#706)
jmonesti
1
-2
/
+2
2021-04-27
Implement JTAG BYPASS register. (#697)
Tim Newsome
2
-11
/
+15
2021-04-13
Display 32 bits (#693)
emelcher
3
-11
/
+39
2021-04-05
replace old compliance name with new arch-test name in spike target README (#...
Allen Baum
1
-6
/
+6
2021-03-26
Add missing require_rv64 for rv64-only insns. (#684)
marcfedorow
6
-0
/
+6
2021-03-25
Merge pull request #683 from huaixv/master
Andrew Waterman
0
-0
/
+0
2021-03-25
Fix statx configure check
Andrew Waterman
2
-3
/
+3
2021-03-26
Fix `stx_ino` member name in commit b65ead8
huaixv
2
-3
/
+3
2021-03-25
Fix xperm.[bhn] on RV32
Andrew Waterman
3
-3
/
+3
2021-03-25
Fix Ubuntu 16.04 build
Andrew Waterman
3
-0
/
+22
2021-03-25
Merge pull request #681 from huaixv/master
Andrew Waterman
4
-0
/
+166
2021-03-25
Add `statx` syscall
huaixv
4
-0
/
+166
2021-03-24
Merge pull request #680 from scottj97/fix-vs-interrupts
Andrew Waterman
1
-1
/
+1
2021-03-24
HS-level interrupts should always be enabled when in VS-mode
Scott Johnson
1
-1
/
+1
2021-03-10
Fix and refactor RV32-only and RV64-only instruction handling
Andrew Waterman
2
-16
/
+14
2021-03-10
Stylistic changes
Andrew Waterman
2
-11
/
+10
2021-03-08
When disabling hypervisor via misa, clear hypervisor state
Scott Johnson
1
-2
/
+8
2021-03-08
Extract hypervisor_exceptions variable
Scott Johnson
1
-7
/
+8
2021-03-08
Merge pull request #649 from ben-marshall/scalar-crypto-fix
Andrew Waterman
23
-262
/
+296
2021-03-07
Forbid `csrw vsstatus` from modifying the UXL field (#671)
Scott Johnson
1
-0
/
+1
2021-03-05
Fix vsstatus.FS misbehavior (#661)
Scott Johnson
2
-35
/
+10
2021-03-05
Fix bug where hstatus.SPVP was being changed when it should not be (#667)
Scott Johnson
1
-1
/
+2
2021-03-05
Don't make MPRV load/store virtual if MPV=1, MPP=3 (#666)
jameshippisley
1
-1
/
+1
2021-03-05
Fix hedeleg to match Privileged Spec requirements (#669)
Scott Johnson
1
-0
/
+2
2021-03-04
Fix bug where CSRW to vsstatus would not set SD correctly (#665)
Scott Johnson
1
-1
/
+1
2021-03-02
Hard-wire VSXL field in RV64 hstatus (#664)
Scott Johnson
1
-0
/
+2
2021-03-02
Fix AMO guest page fault as store guest fault (#663)
francis4096
1
-0
/
+3
2021-03-01
Correct RV64 vsstatus.UXL field (#659)
Scott Johnson
1
-0
/
+1
2021-02-25
Merge pull request #655 from chihminchao/rvv-v0.10
Andrew Waterman
28
-48
/
+64
2021-02-25
Reindent to match style of surrounding code
Scott Johnson
1
-2
/
+2
2021-02-25
Update comment to match misa capabilities
Scott Johnson
1
-1
/
+1
2021-02-24
rvv: update readme
Chih-Min Chao
1
-1
/
+1
2021-02-24
rvv: add vsetivli
Chih-Min Chao
5
-1
/
+9
2021-02-24
rvv: totally remove ediv
Chih-Min Chao
2
-4
/
+1
2021-02-24
rvv: add vse1/vle1
Chih-Min Chao
22
-28
/
+43
2021-02-23
rvv: rename sqrt/reciprocal instructions
Chih-Min Chao
5
-11
/
+11
2021-02-23
rvv: disas: reserved sew >= 128
Chih-Min Chao
1
-4
/
+0
2021-02-18
scalar-crypto: Fix decoding of RV64 AES instructions.
Ben Marshall
17
-238
/
+272
2021-02-18
scalar-crypto: Fix RV32 sha512 instructions.
Ben Marshall
6
-24
/
+24
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