| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2023-05-18 | Call stash_privilege more selectivelyrivosinc-etrigger_fix_exception_match | Andrew Waterman | 7 | -6/+12 | |
| 2023-05-17 | triggers: Fix etrigger match on exceptions | Atul Khare | 2 | -4/+7 | |
| The etrigger match on exceptions doesn't work properly in cases like the following: 1) M-mode delegates ECALLs to S-mode 2) A CPU hardware point mechanism is used to place a breakpoint on the Umode instruction that executes the ECALL from Umode to Smode. In effect, this creates a breakpoint etrigger based on Umode. In the above, the expectation is that #2 will first cause an exit to the Smode handler (stvec), and the hardware breakpoint exception will be triggered following an entry into the handler. However, since etrigger currently checks the current privilege mode, we will never get a match on conditions like #2. The patch attempts to address the issue by using the stashed version of the previous privilege mode for the etrigger match. cc: YenHaoChen <howard25336284@gmail.com> Signed-off-by: Atul Khare <atulkhare@rivosinc.com> | |||||
| 2023-05-17 | Enhance mode_match() functionality | Atul Khare | 2 | -6/+7 | |
| The current version of mode_match() is based on the current privilege level. This adds an explicit privilege and virtual mode parameters in anticipation of an upcoming patch for matching trap triggers. | |||||
| 2023-05-17 | Rename commit_log_stash_privilege() to stash_privilege() | Atul Khare | 1 | -3/+3 | |
| As noted in the previous commit, certain state updates were being made only if commit logging was enabled. The commit_log_ prefix was dropped since the old name no longer made sense with the unconditional updates. | |||||
| 2023-05-17 | Add last_v to processor state | Atul Khare | 3 | -0/+3 | |
| This adds the last_v field to track the previous virtual mode state. It will be used in a forthcoming patch for trigger matching. | |||||
| 2023-05-14 | Fix last_inst_* processor state update | Atul Khare | 1 | -1/+2 | |
| Presently, the following fields in the processor state are updated only when commit logging is enabled. last_inst_priv last_inst_xlen last_inst_flen This means that these fields won't be updated if commit logging is disabled, or if we are in the fast execution path. The fix lays the groundwork for a subsequent patch that uses the previous privilege mode to perform trigger matching. | |||||
| 2023-05-12 | Merge pull request #1347 from rbuchner-aril/rb-872 | Andrew Waterman | 6 | -81/+132 | |
| Fix for #872 mstatus.GVA | |||||
| 2023-05-11 | Use passed in virtual bit for creating traps in take_trigger_action() rahter ↵ | rbuchner | 1 | -1/+1 | |
| than state.v Fixes case 1 from https://github.com/riscv-software-src/riscv-isa-sim/issues/872 | |||||
| 2023-05-11 | Plumb in effective virtual bit to take_trigger_action() | rbuchner | 6 | -16/+17 | |
| 2023-05-11 | Add split_misaligned_access() to mem_access_info_t | rbuchner | 2 | -2/+6 | |
| 2023-05-11 | Pass mem_access_info_t into walk() | rbuchner | 2 | -4/+8 | |
| 2023-05-11 | Use access_info within store_slow_path rather than xlate_flags | Ryan Buchner | 1 | -1/+1 | |
| 2023-05-11 | Use access_info.effective_virt when failed mmio_store (i.e. device detects ↵ | rbuchner | 1 | -1/+1 | |
| access fault) Fixes case 3 from https://github.com/riscv-software-src/riscv-isa-sim/issues/872 | |||||
| 2023-05-11 | Adjust store_slow_path_intrapage to recieve a mem_access_info_t as input | Ryan Buchner | 2 | -8/+10 | |
| 2023-05-11 | Use access_info within load_slow_path rather than xlate_flags | Ryan Buchner | 1 | -2/+2 | |
| Fixes case 2 from https://github.com/riscv-software-src/riscv-isa-sim/issues/872 | |||||
| 2023-05-11 | Use access_info.effective_virt when failed mmio_load (i.e. device detects ↵ | rbuchner | 1 | -1/+1 | |
| access fault) Fixes case 3 from https://github.com/riscv-software-src/riscv-isa-sim/issues/872 | |||||
| 2023-05-11 | Use access_info.effective_virt when access_fault due to non-reservable lr | rbuchner | 1 | -1/+1 | |
| Fixes case 4 from https://github.com/riscv-software-src/riscv-isa-sim/issues/872 | |||||
| 2023-05-11 | Adjust load_slow_path_intrapage to recieve a mem_access_info_t as input | Ryan Buchner | 2 | -10/+12 | |
| 2023-05-11 | Add structure (mem_access_info_t) for holding memory access information | Ryan Buchner | 2 | -21/+41 | |
| Add complementary function for generating access information. Update mmu_t::translate() to accept a mem_access_info_t. | |||||
| 2023-05-11 | Add is_special_access() to xlate_flags_t | rbuchner | 2 | -6/+10 | |
| 2023-05-11 | Add xlate_flags_t struct | rbuchner | 2 | -38/+52 | |
| Use xlate_flags_t rather than XLATE_FLAGS preprocessing directives | |||||
| 2023-05-11 | Rename RISCV_XLATE_VIRT to RISCV_XLATE_FORCED_VIRT | Ryan Buchner | 2 | -7/+7 | |
| More readable/understandable. | |||||
| 2023-05-09 | Merge pull request #1357 from ptomsich/ptomsich/1312-fix-fcvtmod_w_d-exceptions | Andrew Waterman | 1 | -1/+3 | |
| Zfa: fix exception behaviour for fcvtmod.w.d | |||||
| 2023-05-09 | Merge pull request #1356 from ptomsich/ptomsich/1355-fix-fleq-fltq-exceptions | Andrew Waterman | 8 | -0/+8 | |
| Zfa: fix missing set_fp_exceptions for fleq/fltq | |||||
| 2023-05-09 | Merge pull request #1354 from ptomsich/ptomsich/1327-fix-fli_q-entries | Andrew Waterman | 1 | -10/+10 | |
| Fix implementation of FLI.Q instruction | |||||
| 2023-05-09 | Zfa: fix missing set_fp_exceptions for fleq/fltq | Philipp Tomsich | 8 | -0/+8 | |
| 2023-05-09 | Zfa: fix exception behaviour for fcvtmod.w.d | Philipp Tomsich | 1 | -1/+3 | |
| 2023-05-09 | Zfa: fix bitpatterns for fli.q (entries 7, 18-25) | Philipp Tomsich | 1 | -9/+9 | |
| Ref #1327 Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> | |||||
| 2023-05-09 | Zfa: fli.q requires 'Q' not 'D' | Philipp Tomsich | 1 | -1/+1 | |
| Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> | |||||
| 2023-05-09 | Merge pull request #1353 from ptomsich/ptomsich/1351-Zfa-fix-NX-fround-family | Andrew Waterman | 8 | -8/+8 | |
| Zfa: fix NX handling for the fround/froundnx family | |||||
| 2023-05-09 | Zfa: fix NX handling for the fround/froundnx family | Philipp Tomsich | 8 | -8/+8 | |
| The initial implementation (together with the SAIL code and the tests) had gotten the NX variants backwards (as in 'an inexact result is ok' vs. 'set NX is inexact'). Update all 4 instructions. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> | |||||
| 2023-04-26 | Merge pull request #1316 from YenHaoChen/pr-native-triggers | Andrew Waterman | 2 | -3/+19 | |
| implement Debug Specification Section 5.4 Native Triggers | |||||
| 2023-04-26 | triggers: native triggers (action=0) should prevent causing a breakpoint ↵ | YenHaoChen | 2 | -3/+19 | |
| exception while already in a trap handler This commit implements Debug Specification Section 5.4 Native Triggers. The specification allows two solutions for solving the reentrancy problem. This commit chooses the first solution because the second one targets implementations without S-mode. | |||||
| 2023-04-25 | Merge pull request #1281 from jiegec/plic-pending | Andrew Waterman | 2 | -1/+22 | |
| Implement pending bits for plic | |||||
| 2023-04-24 | Merge pull request #1333 from poemonsense/fix-syscall-close | Andrew Waterman | 2 | -3/+12 | |
| Close file descriptors in destructor of syscall_t | |||||
| 2023-04-20 | Merge pull request #1320 from riscv-software-src/clear_wfi | Andrew Waterman | 1 | -1/+2 | |
| Add clear in_wfi interface to proc_t | |||||
| 2023-04-20 | Add clear in_wfi interface to proc_t | Jerry Zhao | 1 | -1/+2 | |
| This enables more flexible modelling of wfi behavior | |||||
| 2023-04-20 | Close file descriptors in destructor of syscall_t | Yinan Xu | 2 | -3/+12 | |
| 2023-04-19 | Merge pull request #1332 from riscv-software-src/fix-1326 | Andrew Waterman | 1 | -2/+2 | |
| Partially revert #1326 | |||||
| 2023-04-19 | Partially revert #1326 | Andrew Waterman | 1 | -2/+2 | |
| Apparently GCC still wants the UNUSED. Not sure why CI didn't catch this initially. | |||||
| 2023-04-19 | Merge pull request #1326 from riscv-software-src/fix-1325 | Andrew Waterman | 1 | -12/+18 | |
| Avoid declaring potentially out-of-bounds references in vmfeq etc. | |||||
| 2023-04-19 | Avoid declaring potentially out-of-bounds references in vmfeq etc. | Andrew Waterman | 1 | -12/+18 | |
| I don't think this was actually broken, since the references weren't used, but it was certainly unsanitary. Fixes #1325 | |||||
| 2023-04-19 | Merge pull request #1322 from plctlab/plct-vector-fix | Andrew Waterman | 10 | -39/+21 | |
| Remove unused parameter for macro in v_ext_macro.h | |||||
| 2023-04-15 | Rename parameters for VI_VFP_NCVT* macros to be consistent with the | Weiwei Li | 1 | -13/+13 | |
| comments in vfncvt*.h | |||||
| 2023-04-15 | Fix comments error in vfncvt_*_w.h | Weiwei Li | 4 | -4/+4 | |
| 2023-04-15 | Remove unused parameter for macro in v_ext_macro.h | Weiwei Li | 10 | -26/+8 | |
| 2023-04-13 | Merge pull request #1317 from riscv-software-src/fesvrdebug | Jerry Zhao | 4 | -1486/+71 | |
| Clean up fesvr/dtm_t | |||||
| 2023-04-12 | Make some dtm_t interfaces protected | Jerry Zhao | 1 | -8/+10 | |
| * This enables useful functionality in inheritors | |||||
| 2023-04-12 | Unify fesvr/debug_defines.h and riscv/debug_defines.h | Jerry Zhao | 2 | -1478/+60 | |
| * fesvr/debug_defines.h is removed | |||||
| 2023-04-12 | Add debug_defines.h to list of installed headers | Jerry Zhao | 1 | -0/+1 | |
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