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rocket-tools/riscv-gnu-toolchain/spike.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
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fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
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p-ext-0.5.2
plctlab-plct-zce-fix2
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sifive/rvv0.9-phase2
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Files
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2020-11-26
Include stdexcept in ELF loader (#603)
Daniel Bates
1
-0
/
+1
2020-11-23
Fix misaligned loads and stores for big endian target (#602)
Marcus Comstedt
1
-2
/
+2
2020-11-23
Fix VSSTATUS bits updation (#568)
Anup Patel
2
-16
/
+20
2020-11-18
Don't include PTE.N bit as part of the PPN
Andrew Waterman
1
-2
/
+2
2020-11-18
Invalid NAPOT settings cause page faults, not access exceptions
Andrew Waterman
1
-2
/
+2
2020-11-18
Add Zsn extension
Andrew Waterman
3
-3
/
+20
2020-11-18
Avoid use of __builtin_popcount for portability
Andrew Waterman
6
-5
/
+16
2020-11-18
Avoid use of __builtin_ctz for portability
Andrew Waterman
6
-14
/
+39
2020-11-18
Avoid use of __builtin_bswap for portability
Andrew Waterman
1
-6
/
+6
2020-11-18
Only use __builtin_expect for __GNUC__
Andrew Waterman
1
-2
/
+7
2020-11-16
Fix byteorder issues with struct riscv_stat (#596)
Marcus Comstedt
1
-32
/
+39
2020-11-16
Merge pull request #598 from chihminchao/pmp-per-core
Andrew Waterman
3
-38
/
+46
2020-11-15
dts: config pmp attribute by each core's setting
Chih-Min Chao
3
-29
/
+25
2020-11-15
dts: extract cpu node checking as helper function
Chih-Min Chao
1
-9
/
+21
2020-11-12
Correct AMO exception cause for misaligned accesses (#594)
Scott Johnson
1
-0
/
+3
2020-11-12
Merge pull request #592 from scottj97/fix-misaligned-lr
Andrew Waterman
3
-8
/
+8
2020-11-12
Merge pull request #593 from chihminchao/selective-mmu-mode
Andrew Waterman
7
-31
/
+194
2020-11-11
dts: mmu: parse mmu-type in dts
Chih-Min Chao
1
-0
/
+48
2020-11-11
dts: extend dts api to get info of each cpu
Chih-Min Chao
2
-0
/
+43
2020-11-11
mmu: check mmu support
Chih-Min Chao
2
-9
/
+39
2020-11-11
mmu: extract common part of satp and vsatp setting
Chih-Min Chao
2
-25
/
+21
2020-11-11
mmu: add impl table and set function
Chih-Min Chao
3
-1
/
+47
2020-11-11
Use new require_alignment flag to simplify AMO check
Scott Johnson
1
-3
/
+1
2020-11-11
Make LR properly take misaligned exception
Scott Johnson
3
-6
/
+8
2020-11-09
Update readme to reflect bi-endian support
Andrew Waterman
1
-0
/
+1
2020-11-09
Merge pull request #575 from zeldin/big-endian
Andrew Waterman
16
-81
/
+321
2020-11-07
Make mmu_t::target_big_endian always available
Marcus Comstedt
1
-12
/
+2
2020-11-07
Allow fixed endianness to be observed through MBE/SBE/UBE
Marcus Comstedt
3
-3
/
+18
2020-11-07
Tag target endian values to help guide conversion code
Marcus Comstedt
9
-70
/
+135
2020-11-07
Update generated configure script
Marcus Comstedt
2
-0
/
+25
2020-11-07
Implement support for big-endian targets
Marcus Comstedt
10
-29
/
+174
2020-11-02
Merge pull request #588 from kito-cheng/master
Andrew Waterman
1
-0
/
+1
2020-11-03
doc: update readme for bitmanip 0.92
Kito Cheng
1
-0
/
+1
2020-10-27
Merge pull request #586 from chihminchao/rvv-fix-2020-10-26
Andrew Waterman
2
-13
/
+16
2020-10-26
rvv: check extra dst for index segment load
Chih-Min Chao
1
-12
/
+15
2020-10-26
commitlog: fix compilation warning
Chih-Min Chao
1
-1
/
+1
2020-10-26
Validate integer command-line arguments
Andrew Waterman
1
-6
/
+23
2020-10-25
Merge pull request #582 from avpatel/riscv_s2xlate_trap_fix_v1
Andrew Waterman
2
-8
/
+8
2020-10-24
Fix trap generation in s2xlate()
Anup Patel
2
-8
/
+8
2020-10-22
Merge pull request #580 from riscv/riscv-bitmanip
Andrew Waterman
109
-2
/
+1040
2020-10-22
Swap MAX and MINU encodings
Andrew Waterman
1
-3
/
+3
2020-10-22
Remove subu.w; change addu.w definition
Andrew Waterman
3
-5
/
+1
2020-10-22
Start adding B ext to disassembler
Andrew Waterman
1
-0
/
+13
2020-10-22
[riscv-bitmanip] Add sh[123]add[u.w] instruction
Clifford Wolf
8
-0
/
+39
2020-10-22
[riscv-bitmanip] Bugfixes in RV32B impl of CRC, SRO, [UN]SHFL
Clifford Wolf
14
-14
/
+14
2020-10-22
[riscv-bitmanip] Changes for RISC-V Bitmanip Spec 0.92
Clifford Wolf
9
-23
/
+57
2020-10-22
[riscv-bitmanip] Changes for RISC-V Bitmanip Spec 0.91
Clifford Wolf
8
-25
/
+111
2020-10-22
[riscv-bitmanip] Fix [un]shfl shamt length
Clifford Wolf
1
-2
/
+2
2020-10-22
[riscv-bitmanip] Add bitmanip instructions
Clifford Wolf
92
-2
/
+872
2020-10-21
Update htif.cc (#577)
S.Pawan Kumar
1
-1
/
+1
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