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AgeCommit message (Expand)AuthorFilesLines
2014-11-19Add missing makefile dependenceAndrew Waterman2-2/+3
2014-11-07Merge pull request #8 from arunthomas/dummy_rocc_testAndrew Waterman1-2/+2
2014-10-30dummy-rocc-test build fixArun Thomas1-2/+2
2014-10-24Merge pull request #4 from arunthomas/custom_instYunsup Lee25-0/+72
2014-10-23Enable support for the four custom instructionsArun Thomas25-0/+72
2014-09-27Avoid some unused variable warningsAndrew Waterman3-15/+20
2014-09-27Avoid use of __int128_tAndrew Waterman11-22/+54
2014-09-21Merge pull request #2 from arunthomas/build_fixScott Beamer1-1/+1
2014-09-20Update riscv.ac to set CPPFLAGS with fesvr include pathArun Thomas1-1/+1
2014-09-14now can build with clangScott Beamer1-1/+2
2014-08-28Update configure to set CPPFLAGS instead of CFLAGS with fesvr include path.Jim Lawson1-1/+1
2014-08-27don't include same flags twiceScott Beamer1-1/+1
2014-08-25clean up warnings from clangScott Beamer2-3/+1
2014-08-15Added PC histogram option.Christopher Celio8-1/+70
2014-08-07Support uarch counters (degenerately)Andrew Waterman1-0/+17
2014-08-07fix typo in READMEScott Beamer1-1/+1
2014-08-05change README to markdownSagar Karandikar2-97/+98
2014-07-24added support for register convention names in debug modeScott Beamer4-26/+34
2014-07-16couple of more notes on debug modeScott Beamer1-0/+11
2014-07-15notes on using debug modeScott Beamer1-0/+30
2014-07-08Disallow access to FCSR when FP is disabledAndrew Waterman2-17/+24
2014-07-07Use precompiled headers to speed up compilationAndrew Waterman11-28/+37
2014-07-07Minor refactoringAndrew Waterman1-13/+13
2014-06-13Commit log now prints while interrupts are enabled.Christopher Celio2-14/+17
2014-06-13Only print commit log if instruction commitsAndrew Waterman3-5/+21
2014-06-12Set status.u64 to true on bootAndrew Waterman1-1/+1
2014-04-24fix disassembly of bnez and friendsAndrew Waterman1-1/+1
2014-04-03Merge branch 'tm'Stephen Twigg4-155/+158
2014-04-03Sync encoding in opcodesStephen Twigg2-155/+168
2014-04-03Add ut_fclass_s/d hwacha (unused until encoding sync)Stephen Twigg2-0/+2
2014-03-18Support RV32 RDTIMEH/RDCYCLEH/RDINSTRETHAndrew Waterman8-11/+29
2014-03-15speed up compilation a bitAndrew Waterman2-2/+2
2014-03-11New FP encodingAndrew Waterman1-42/+42
2014-03-06Add fclass.{s|d} instructionsAndrew Waterman8-0/+82
2014-03-02add hwacha vfmsv instructionsYunsup Lee5-5/+12
2014-02-25add extensions to riscv-dis for better disassemblyYunsup Lee1-1/+16
2014-02-14Renumber uarch CSRs into custom CSR spaceAndrew Waterman1-16/+16
2014-02-13Fix I$ simulator not making forward progressAndrew Waterman2-21/+17
2014-02-12Fix commit log when !debugAndrew Waterman1-25/+15
2014-02-10Revert to old AUIPC definitionAndrew Waterman1-1/+1
2014-02-07Clear EVEC LSBs, which kindly prevents a segfaultAndrew Waterman1-2/+2
2014-02-06Fix disassembly of JALAndrew Waterman1-1/+1
2014-02-06commit missing definitions for uarch countersYunsup Lee1-0/+56
2014-02-03Move half precision instructions, add vfmsv, vfmvvQuan Nguyen48-137/+265
2014-01-31Fix linking on DarwinAndrew Waterman3-4/+3
2014-01-28Disasm now translates xor x0,x0,x0 as a machine-generated bubble ("-").Christopher Celio1-0/+1
2014-01-28Force extension loaders to be linked inAndrew Waterman2-6/+10
2014-01-26Enable runtime loading of dynamic library with --extlibAndrew Waterman5-158/+160
2014-01-26Prefer libraries located in current directoryAndrew Waterman1-4/+4
2014-01-26Eliminate hwacha <-> riscv circular dependenceAndrew Waterman11-110/+170
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