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2014-12-11Merge pull request #11 from arunthomas/readmehwachav4Andrew Waterman1-2/+2
README: use gnu-toolchain
2014-12-11README: use gnu-toolchainArun Thomas1-2/+2
2014-12-05zero-extend 32b instructions for vxcptauxAndrew Waterman2-6/+6
2014-12-04Support 2/4/6/8-byte instructionsAndrew Waterman5-47/+66
Most of the complexity is in instruction address translation, since instructions may span page boundaries.
2014-12-04Set badvaddr on instruction page faultsAndrew Waterman3-5/+4
This supports distinguishing the EPC (the address of the first byte of the faulting instruction) from the address of the page fault (potentially some bytes later).
2014-12-03Update register names to match new ABIAndrew Waterman1-8/+8
2014-11-30Implement timer faithfullyAndrew Waterman10-57/+87
rdcycle/rdinstret now have single-instruction granularity. Questionable behavior when timer interrupts occurred around the same time as the compare register is written should be fixed.
2014-11-25Factor out the dummy RoCC acceleratorAndrew Waterman15-40/+104
2014-11-22Revert "Enable support for the four custom instructions"Yunsup Lee25-72/+0
This reverts commit fd18dc43f64d1938144f6c883ba4a2ca247611c6. Refactoring support for custom instructions.
2014-11-19Suppress harmless warningsAndrew Waterman2-4/+4
specifically, unused variables in auto-generated code.
2014-11-19Add missing makefile dependenceAndrew Waterman2-2/+3
This manifested as a spurious compile warning when using make -j.
2014-11-07Merge pull request #8 from arunthomas/dummy_rocc_testAndrew Waterman1-2/+2
dummy-rocc-test build fix
2014-10-30dummy-rocc-test build fixArun Thomas1-2/+2
2014-10-24Merge pull request #4 from arunthomas/custom_instYunsup Lee25-0/+72
Enable support for the four custom instructions
2014-10-23Enable support for the four custom instructionsArun Thomas25-0/+72
* Update generated encoding.h (generated from riscv-opcodes) * Add empty implementations for the custom instructions
2014-09-27Avoid some unused variable warningsAndrew Waterman3-15/+20
...and also save some space by not defining the register names in a header.
2014-09-27Avoid use of __int128_tAndrew Waterman11-22/+54
It is nonstandard, and GCC doesn't support it on 32-bit platforms. The resulting code for MULH[[S]U] is crappier, but that doesn't really matter, as these instructions are dynamically infrequent.
2014-09-21Merge pull request #2 from arunthomas/build_fixScott Beamer1-1/+1
Update riscv.ac to set CPPFLAGS with fesvr include path
2014-09-20Update riscv.ac to set CPPFLAGS with fesvr include pathArun Thomas1-1/+1
Need to set CPPFLAGS in riscv.ac in addition to configure
2014-09-14now can build with clangScott Beamer1-1/+2
on os x, clang needs different flags than gcc to generate and use precompiled headers
2014-08-28Update configure to set CPPFLAGS instead of CFLAGS with fesvr include path.Jim Lawson1-1/+1
Since we no longer are duplicating CFLAGS, ensure CPPFLAGS are set correctly.
2014-08-27don't include same flags twiceScott Beamer1-1/+1
2014-08-25clean up warnings from clangScott Beamer2-3/+1
2014-08-15Added PC histogram option.Christopher Celio8-1/+70
- Spits out all PCs (on 4B granularity) executed with count. - Requires a compile time configuration option. - Also requires a run-time flag.
2014-08-07Support uarch counters (degenerately)Andrew Waterman1-0/+17
2014-08-07fix typo in READMEScott Beamer1-1/+1
2014-08-05change README to markdownSagar Karandikar2-97/+98
2014-07-24added support for register convention names in debug modeScott Beamer4-26/+34
2014-07-16couple of more notes on debug modeScott Beamer1-0/+11
2014-07-15notes on using debug modeScott Beamer1-0/+30
2014-07-08Disallow access to FCSR when FP is disabledAndrew Waterman2-17/+24
2014-07-07Use precompiled headers to speed up compilationAndrew Waterman11-28/+37
2014-07-07Minor refactoringAndrew Waterman1-13/+13
2014-06-13Commit log now prints while interrupts are enabled.Christopher Celio2-14/+17
- Previous behavior was to print the commit log only in user code.
2014-06-13Only print commit log if instruction commitsAndrew Waterman3-5/+21
2014-06-12Set status.u64 to true on bootAndrew Waterman1-1/+1
This isn't required by the ISA but it matches existing HW.
2014-04-24fix disassembly of bnez and friendsAndrew Waterman1-1/+1
2014-04-03Merge branch 'tm'Stephen Twigg4-155/+158
2014-04-03Sync encoding in opcodesStephen Twigg2-155/+168
2014-04-03Add ut_fclass_s/d hwacha (unused until encoding sync)Stephen Twigg2-0/+2
2014-03-18Support RV32 RDTIMEH/RDCYCLEH/RDINSTRETHAndrew Waterman8-11/+29
2014-03-15speed up compilation a bitAndrew Waterman2-2/+2
2014-03-11New FP encodingAndrew Waterman1-42/+42
2014-03-06Add fclass.{s|d} instructionsAndrew Waterman8-0/+82
2014-03-02add hwacha vfmsv instructionsYunsup Lee5-5/+12
2014-02-25add extensions to riscv-dis for better disassemblyYunsup Lee1-1/+16
2014-02-14Renumber uarch CSRs into custom CSR spaceAndrew Waterman1-16/+16
2014-02-13Fix I$ simulator not making forward progressAndrew Waterman2-21/+17
2014-02-12Fix commit log when !debugAndrew Waterman1-25/+15
2014-02-10Revert to old AUIPC definitionAndrew Waterman1-1/+1
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