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-rw-r--r--riscv/mmu.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/riscv/mmu.h b/riscv/mmu.h
index 6d8072b..f652bf8 100644
--- a/riscv/mmu.h
+++ b/riscv/mmu.h
@@ -71,8 +71,11 @@ public:
inline void misaligned_store(reg_t addr, reg_t data, size_t size, uint32_t xlate_flags, bool actually_store=true)
{
#ifdef RISCV_ENABLE_MISALIGNED
- for (size_t i = 0; i < size; i++)
- store_uint8(addr + (target_big_endian? size-1-i : i), data >> (i * 8), actually_store);
+ for (size_t i = 0; i < size; i++) {
+ const reg_t byteaddr = addr + (target_big_endian? size-1-i : i);
+ const reg_t bytedata = data >> (i * 8);
+ store_uint8(byteaddr, bytedata, actually_store);
+ }
#else
bool gva = ((proc) ? proc->state.v : false) || (RISCV_XLATE_VIRT & xlate_flags);
throw trap_store_address_misaligned(gva, addr, 0, 0);