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-rw-r--r--riscv/csrs.cc20
1 files changed, 11 insertions, 9 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc
index 6f8f260..be23a2e 100644
--- a/riscv/csrs.cc
+++ b/riscv/csrs.cc
@@ -466,15 +466,7 @@ bool sstatus_proxy_csr_t::unlogged_write(const reg_t val) noexcept {
// implement class mstatus_csr_t
mstatus_csr_t::mstatus_csr_t(processor_t* const proc, const reg_t addr):
base_status_csr_t(proc, addr),
- val(0
- | (proc->extension_enabled_const('U') && (proc->get_const_xlen() != 32) ? set_field((reg_t)0, MSTATUS_UXL, xlen_to_uxl(proc->get_const_xlen())) : 0)
- | (proc->extension_enabled_const('S') && (proc->get_const_xlen() != 32) ? set_field((reg_t)0, MSTATUS_SXL, xlen_to_uxl(proc->get_const_xlen())) : 0)
-
-#ifdef RISCV_ENABLE_DUAL_ENDIAN
- | (proc->get_mmu()->is_target_big_endian() ? MSTATUS_UBE | MSTATUS_SBE | MSTATUS_MBE : 0)
-#endif
- | 0 // initial value for mstatus
- ) {
+ val(compute_mstatus_initial_value()) {
}
bool mstatus_csr_t::unlogged_write(const reg_t val) noexcept {
@@ -497,6 +489,16 @@ bool mstatus_csr_t::unlogged_write(const reg_t val) noexcept {
return true;
}
+reg_t mstatus_csr_t::compute_mstatus_initial_value() const noexcept {
+ return 0
+ | (proc->extension_enabled_const('U') && (proc->get_const_xlen() != 32) ? set_field((reg_t)0, MSTATUS_UXL, xlen_to_uxl(proc->get_const_xlen())) : 0)
+ | (proc->extension_enabled_const('S') && (proc->get_const_xlen() != 32) ? set_field((reg_t)0, MSTATUS_SXL, xlen_to_uxl(proc->get_const_xlen())) : 0)
+#ifdef RISCV_ENABLE_DUAL_ENDIAN
+ | (proc->get_mmu()->is_target_big_endian() ? MSTATUS_UBE | MSTATUS_SBE | MSTATUS_MBE : 0)
+#endif
+ | 0; // initial value for mstatus
+}
+
// implement class rv32_low_csr_t
rv32_low_csr_t::rv32_low_csr_t(processor_t* const proc, const reg_t addr, csr_t_p orig):
csr_t(proc, addr),