diff options
| -rw-r--r-- | config.h.in | 3 | ||||
| -rwxr-xr-x | configure | 15 | ||||
| -rw-r--r-- | riscv/decode.h | 19 | ||||
| -rw-r--r-- | riscv/insn_template.cc | 4 | ||||
| -rw-r--r-- | riscv/processor.cc | 766 | ||||
| -rw-r--r-- | riscv/processor.h | 7 | ||||
| -rw-r--r-- | riscv/riscv.ac | 5 | ||||
| -rw-r--r-- | riscv/sim.cc | 4 | ||||
| -rw-r--r-- | spike_main/spike.cc | 32 |
9 files changed, 3 insertions, 852 deletions
diff --git a/config.h.in b/config.h.in index f80fd17..4f7f39f 100644 --- a/config.h.in +++ b/config.h.in @@ -84,9 +84,6 @@ /* Enable hardware support for misaligned loads and stores */ #undef RISCV_ENABLE_MISALIGNED -/* Enable implementation check for specific instructions */ -#undef RISCV_ENABLE_IMPL_CHECK - /* Define if subproject MCPPBS_SPROJ_NORM is enabled */ #undef SOFTFLOAT_ENABLED @@ -708,7 +708,6 @@ enable_commitlog enable_histogram enable_dirty enable_misaligned -enable_impl_check ' ac_precious_vars='build_alias host_alias @@ -1357,7 +1356,6 @@ Optional Features: bits --enable-misaligned Enable hardware support for misaligned loads and stores - --enable-impl-check Enable implementation check Optional Packages: --with-PACKAGE[=ARG] use PACKAGE [ARG=yes] @@ -4819,19 +4817,6 @@ $as_echo "#define RISCV_ENABLE_MISALIGNED /**/" >>confdefs.h fi -# Check whether --enable-impl-check was given. -if test "${enable_impl_check+set}" = set; then : - enableval=$enable_impl_check; -fi - -if test "x$enable_impl_check" = "xyes"; then : - - -$as_echo "#define RISCV_ENABLE_IMPL_CHECK /**/" >>confdefs.h - - -fi - diff --git a/riscv/decode.h b/riscv/decode.h index 64bb404..6a09085 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -361,25 +361,6 @@ inline long double to_f(float128_t f){long double r; memcpy(&r, &f, sizeof(r)); #define DEBUG_RVV_FMA_VF 0 #endif -#ifdef RISCV_ENABLE_IMPL_CHECK -#define VI_CHECK_IMPL \ - extern unsigned g_check_impl; \ - extern bool g_has_unsupport; \ - { \ - auto val = P.VU.impl_table.find(local_op); \ - if (val != P.VU.impl_table.end()) { \ - auto val2 = val->second.find(g_check_impl); \ - if (val2 == val->second.end()) {\ - fprintf(stderr, "unsupported in %u\n", g_check_impl); \ - g_has_unsupport = true; \ - }; \ - }; \ - }; -#else -#define VI_CHECK_IMPL \ - while (0); -#endif - extern bool g_vector_mistrap; // diff --git a/riscv/insn_template.cc b/riscv/insn_template.cc index 893a08a..1e79326 100644 --- a/riscv/insn_template.cc +++ b/riscv/insn_template.cc @@ -6,9 +6,7 @@ reg_t rv32_NAME(processor_t* p, insn_t insn, reg_t pc) { int xlen = 32; reg_t npc = sext_xlen(pc + insn_length(OPCODE)); - const uint32_t local_op = OPCODE; #include "insns/NAME.h" - VI_CHECK_IMPL; trace_opcode(p, OPCODE, insn); return npc; } @@ -17,9 +15,7 @@ reg_t rv64_NAME(processor_t* p, insn_t insn, reg_t pc) { int xlen = 64; reg_t npc = sext_xlen(pc + insn_length(OPCODE)); - const uint32_t local_op = OPCODE; #include "insns/NAME.h" - VI_CHECK_IMPL; trace_opcode(p, OPCODE, insn); return npc; } diff --git a/riscv/processor.cc b/riscv/processor.cc index 33687ce..9e74bc2 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -336,772 +336,6 @@ reg_t processor_t::vectorUnit_t::set_vl(int rd, int rs1, reg_t reqVL, reg_t newT return vl; } -processor_t::vectorUnit_t::vectorUnit_t() - : reg_file(0) -{ - - uint64_t val_any = 'a' << 16 | 'n' << 8 | 'y'; - uint64_t val_e27 = 'e' << 16 | '2' << 8 | '7'; - uint64_t val_1905 = 1905; - - const uint32_t tbl_any[] = { - MATCH_VSETVLI, - MATCH_VSETVL, - MATCH_VLB_V, - MATCH_VLH_V, - MATCH_VLW_V, - MATCH_VLE_V, - MATCH_VLBU_V, - MATCH_VLHU_V, - MATCH_VLWU_V, - MATCH_VSB_V, - MATCH_VSH_V, - MATCH_VSW_V, - MATCH_VSE_V, - MATCH_VLSB_V, - MATCH_VLSH_V, - MATCH_VLSW_V, - MATCH_VLSE_V, - MATCH_VLSBU_V, - MATCH_VLSHU_V, - MATCH_VLSWU_V, - MATCH_VSSB_V, - MATCH_VSSH_V, - MATCH_VSSW_V, - MATCH_VSSE_V, - MATCH_VLXB_V, - MATCH_VLXH_V, - MATCH_VLXW_V, - MATCH_VLXE_V, - MATCH_VLXBU_V, - MATCH_VLXHU_V, - MATCH_VLXWU_V, - MATCH_VSXB_V, - MATCH_VSXH_V, - MATCH_VSXW_V, - MATCH_VSXE_V, - MATCH_VSUXB_V, - MATCH_VSUXH_V, - MATCH_VSUXW_V, - MATCH_VSUXE_V, - MATCH_VLBFF_V, - MATCH_VLHFF_V, - MATCH_VLWFF_V, - MATCH_VLEFF_V, - MATCH_VLBUFF_V, - MATCH_VLHUFF_V, - MATCH_VLWUFF_V, - MATCH_VFADD_VF, - MATCH_VFSUB_VF, - MATCH_VFMIN_VF, - MATCH_VFMAX_VF, - MATCH_VFSGNJ_VF, - MATCH_VFSGNJN_VF, - MATCH_VFSGNJX_VF, - MATCH_VFMV_S_F, - MATCH_VFMERGE_VFM, - MATCH_VFMV_V_F, - MATCH_VMFEQ_VF, - MATCH_VMFLE_VF, - MATCH_VMFLT_VF, - MATCH_VMFNE_VF, - MATCH_VMFGT_VF, - MATCH_VMFGE_VF, - MATCH_VFDIV_VF, - MATCH_VFRDIV_VF, - MATCH_VFMUL_VF, - MATCH_VFRSUB_VF, - MATCH_VFMADD_VF, - MATCH_VFNMADD_VF, - MATCH_VFMSUB_VF, - MATCH_VFNMSUB_VF, - MATCH_VFMACC_VF, - MATCH_VFNMACC_VF, - MATCH_VFMSAC_VF, - MATCH_VFNMSAC_VF, - MATCH_VFWADD_VF, - MATCH_VFWSUB_VF, - MATCH_VFWADD_WF, - MATCH_VFWSUB_WF, - MATCH_VFWMUL_VF, - MATCH_VFWMACC_VF, - MATCH_VFWNMACC_VF, - MATCH_VFWMSAC_VF, - MATCH_VFWNMSAC_VF, - MATCH_VFADD_VV, - MATCH_VFREDSUM_VS, - MATCH_VFSUB_VV, - MATCH_VFREDOSUM_VS, - MATCH_VFMIN_VV, - MATCH_VFREDMIN_VS, - MATCH_VFMAX_VV, - MATCH_VFREDMAX_VS, - MATCH_VFSGNJ_VV, - MATCH_VFSGNJN_VV, - MATCH_VFSGNJX_VV, - MATCH_VFMV_F_S, - MATCH_VMFEQ_VV, - MATCH_VMFLE_VV, - MATCH_VMFLT_VV, - MATCH_VMFNE_VV, - MATCH_VFDIV_VV, - MATCH_VFMUL_VV, - MATCH_VFMADD_VV, - MATCH_VFNMADD_VV, - MATCH_VFMSUB_VV, - MATCH_VFNMSUB_VV, - MATCH_VFMACC_VV, - MATCH_VFNMACC_VV, - MATCH_VFMSAC_VV, - MATCH_VFNMSAC_VV, - MATCH_VFCVT_XU_F_V, - MATCH_VFCVT_X_F_V, - MATCH_VFCVT_F_XU_V, - MATCH_VFCVT_F_X_V, - MATCH_VFWCVT_XU_F_V, - MATCH_VFWCVT_X_F_V, - MATCH_VFWCVT_F_XU_V, - MATCH_VFWCVT_F_X_V, - MATCH_VFWCVT_F_F_V, - MATCH_VFNCVT_XU_F_W, - MATCH_VFNCVT_X_F_W, - MATCH_VFNCVT_F_XU_W, - MATCH_VFNCVT_F_X_W, - MATCH_VFNCVT_F_F_W, - MATCH_VFNCVT_ROD_F_F_W, - MATCH_VFSQRT_V, - MATCH_VFCLASS_V, - MATCH_VFWADD_VV, - MATCH_VFWREDSUM_VS, - MATCH_VFWSUB_VV, - MATCH_VFWREDOSUM_VS, - MATCH_VFWADD_WV, - MATCH_VFWSUB_WV, - MATCH_VFWMUL_VV, - MATCH_VFDOT_VV, - MATCH_VFWMACC_VV, - MATCH_VFWNMACC_VV, - MATCH_VFWMSAC_VV, - MATCH_VFWNMSAC_VV, - MATCH_VADD_VX, - MATCH_VSUB_VX, - MATCH_VRSUB_VX, - MATCH_VMINU_VX, - MATCH_VMIN_VX, - MATCH_VMAXU_VX, - MATCH_VMAX_VX, - MATCH_VAND_VX, - MATCH_VOR_VX, - MATCH_VXOR_VX, - MATCH_VRGATHER_VX, - MATCH_VSLIDEUP_VX, - MATCH_VSLIDEDOWN_VX, - MATCH_VADC_VXM, - MATCH_VMADC_VXM, - MATCH_VSBC_VXM, - MATCH_VMSBC_VXM, - MATCH_VMERGE_VXM, - MATCH_VMV_V_X, - MATCH_VMSEQ_VX, - MATCH_VMSNE_VX, - MATCH_VMSLTU_VX, - MATCH_VMSLT_VX, - MATCH_VMSLEU_VX, - MATCH_VMSLE_VX, - MATCH_VMSGTU_VX, - MATCH_VMSGT_VX, - MATCH_VSADDU_VX, - MATCH_VSADD_VX, - MATCH_VSSUBU_VX, - MATCH_VSSUB_VX, - MATCH_VAADD_VX, - MATCH_VSLL_VX, - MATCH_VASUB_VX, - MATCH_VSMUL_VX, - MATCH_VSRL_VX, - MATCH_VSRA_VX, - MATCH_VSSRL_VX, - MATCH_VSSRA_VX, - MATCH_VNSRL_WX, - MATCH_VNSRA_WX, - MATCH_VNCLIPU_WX, - MATCH_VNCLIP_WX, - MATCH_VQMACCU_VX, - MATCH_VQMACC_VX, - MATCH_VQMACCSU_VX, - MATCH_VQMACCUS_VX, - MATCH_VADD_VV, - MATCH_VSUB_VV, - MATCH_VMINU_VV, - MATCH_VMIN_VV, - MATCH_VMAXU_VV, - MATCH_VMAX_VV, - MATCH_VAND_VV, - MATCH_VOR_VV, - MATCH_VXOR_VV, - MATCH_VRGATHER_VV, - MATCH_VADC_VVM, - MATCH_VMADC_VVM, - MATCH_VSBC_VVM, - MATCH_VMSBC_VVM, - MATCH_VMERGE_VVM, - MATCH_VMV_V_V, - MATCH_VMSEQ_VV, - MATCH_VMSNE_VV, - MATCH_VMSLTU_VV, - MATCH_VMSLT_VV, - MATCH_VMSLEU_VV, - MATCH_VMSLE_VV, - MATCH_VSADDU_VV, - MATCH_VSADD_VV, - MATCH_VSSUBU_VV, - MATCH_VSSUB_VV, - MATCH_VAADD_VV, - MATCH_VSLL_VV, - MATCH_VASUB_VV, - MATCH_VSMUL_VV, - MATCH_VSRL_VV, - MATCH_VSRA_VV, - MATCH_VSSRL_VV, - MATCH_VSSRA_VV, - MATCH_VNSRL_WV, - MATCH_VNSRA_WV, - MATCH_VNCLIPU_WV, - MATCH_VNCLIP_WV, - MATCH_VWREDSUMU_VS, - MATCH_VWREDSUM_VS, - MATCH_VDOTU_VV, - MATCH_VDOT_VV, - MATCH_VQMACCU_VV, - MATCH_VQMACC_VV, - MATCH_VQMACCSU_VV, - MATCH_VADD_VI, - MATCH_VRSUB_VI, - MATCH_VAND_VI, - MATCH_VOR_VI, - MATCH_VXOR_VI, - MATCH_VRGATHER_VI, - MATCH_VSLIDEUP_VI, - MATCH_VSLIDEDOWN_VI, - MATCH_VADC_VIM, - MATCH_VMADC_VIM, - MATCH_VMERGE_VIM, - MATCH_VMV_V_I, - MATCH_VMSEQ_VI, - MATCH_VMSNE_VI, - MATCH_VMSLEU_VI, - MATCH_VMSLE_VI, - MATCH_VMSGTU_VI, - MATCH_VMSGT_VI, - MATCH_VSADDU_VI, - MATCH_VSADD_VI, - MATCH_VSLL_VI, - MATCH_VSRL_VI, - MATCH_VSRA_VI, - MATCH_VSSRL_VI, - MATCH_VSSRA_VI, - MATCH_VNSRL_WI, - MATCH_VNSRA_WI, - MATCH_VNCLIPU_WI, - MATCH_VNCLIP_WI, - MATCH_VREDSUM_VS, - MATCH_VREDAND_VS, - MATCH_VREDOR_VS, - MATCH_VREDXOR_VS, - MATCH_VREDMINU_VS, - MATCH_VREDMIN_VS, - MATCH_VREDMAXU_VS, - MATCH_VREDMAX_VS, - MATCH_VMV_X_S, - MATCH_VPOPC_M, - MATCH_VFIRST_M, - MATCH_VCOMPRESS_VM, - MATCH_VMANDNOT_MM, - MATCH_VMAND_MM, - MATCH_VMOR_MM, - MATCH_VMXOR_MM, - MATCH_VMORNOT_MM, - MATCH_VMNAND_MM, - MATCH_VMNOR_MM, - MATCH_VMXNOR_MM, - MATCH_VMSBF_M, - MATCH_VMSOF_M, - MATCH_VMSIF_M, - MATCH_VIOTA_M, - MATCH_VID_V, - MATCH_VDIVU_VV, - MATCH_VDIV_VV, - MATCH_VREMU_VV, - MATCH_VREM_VV, - MATCH_VMULHU_VV, - MATCH_VMUL_VV, - MATCH_VMULHSU_VV, - MATCH_VMULH_VV, - MATCH_VMADD_VV, - MATCH_VNMSUB_VV, - MATCH_VMACC_VV, - MATCH_VNMSAC_VV, - MATCH_VWADDU_VV, - MATCH_VWADD_VV, - MATCH_VWSUBU_VV, - MATCH_VWSUB_VV, - MATCH_VWADDU_WV, - MATCH_VWADD_WV, - MATCH_VWSUBU_WV, - MATCH_VWSUB_WV, - MATCH_VWMULU_VV, - MATCH_VWMULSU_VV, - MATCH_VWMUL_VV, - MATCH_VWMACCU_VV, - MATCH_VWMACC_VV, - MATCH_VWMACCSU_VV, - MATCH_VMV_S_X, - MATCH_VSLIDE1UP_VX, - MATCH_VSLIDE1DOWN_VX, - MATCH_VDIVU_VX, - MATCH_VDIV_VX, - MATCH_VREMU_VX, - MATCH_VREM_VX, - MATCH_VMULHU_VX, - MATCH_VMUL_VX, - MATCH_VMULHSU_VX, - MATCH_VMULH_VX, - MATCH_VMADD_VX, - MATCH_VNMSUB_VX, - MATCH_VMACC_VX, - MATCH_VNMSAC_VX, - MATCH_VWADDU_VX, - MATCH_VWADD_VX, - MATCH_VWSUBU_VX, - MATCH_VWSUB_VX, - MATCH_VWADDU_WX, - MATCH_VWADD_WX, - MATCH_VWSUBU_WX, - MATCH_VWSUB_WX, - MATCH_VWMULU_VX, - MATCH_VWMULSU_VX, - MATCH_VWMUL_VX, - MATCH_VWMACCU_VX, - MATCH_VWMACC_VX, - MATCH_VWMACCSU_VX, - MATCH_VWMACCUS_VX, - MATCH_VAMOSWAPW_V, - MATCH_VAMOADDW_V, - MATCH_VAMOXORW_V, - MATCH_VAMOANDW_V, - MATCH_VAMOORW_V, - MATCH_VAMOMINW_V, - MATCH_VAMOMAXW_V, - MATCH_VAMOMINUW_V, - MATCH_VAMOMAXUW_V, - MATCH_VAMOSWAPD_V, - MATCH_VAMOADDD_V, - MATCH_VAMOXORD_V, - MATCH_VAMOANDD_V, - MATCH_VAMOORD_V, - MATCH_VAMOMIND_V, - MATCH_VAMOMAXD_V, - MATCH_VAMOMINUD_V, - MATCH_VAMOMAXUD_V, - MATCH_VAMOSWAPQ_V, - MATCH_VAMOADDQ_V, - MATCH_VAMOXORQ_V, - MATCH_VAMOANDQ_V, - MATCH_VAMOORQ_V, - MATCH_VAMOMINQ_V, - MATCH_VAMOMAXQ_V, - MATCH_VAMOMINUQ_V, - MATCH_VAMOMAXUQ_V, - }; - - const uint64_t tbl_e27[] = { - MATCH_VSETVLI, - MATCH_VSETVL, - MATCH_VLB_V, - MATCH_VLH_V, - MATCH_VLW_V, - MATCH_VLE_V, - MATCH_VLBU_V, - MATCH_VLHU_V, - MATCH_VLWU_V, - MATCH_VSB_V, - MATCH_VSH_V, - MATCH_VSW_V, - MATCH_VSE_V, - MATCH_VLSB_V, - MATCH_VLSH_V, - MATCH_VLSW_V, - MATCH_VLSE_V, - MATCH_VLSBU_V, - MATCH_VLSHU_V, - MATCH_VLSWU_V, - MATCH_VSSB_V, - MATCH_VSSH_V, - MATCH_VSSW_V, - MATCH_VSSE_V, - MATCH_VLXB_V, - MATCH_VLXH_V, - MATCH_VLXW_V, - MATCH_VLXE_V, - MATCH_VLXBU_V, - MATCH_VLXHU_V, - MATCH_VLXWU_V, - MATCH_VSXB_V, - MATCH_VSXH_V, - MATCH_VSXW_V, - MATCH_VSXE_V, - MATCH_VSUXB_V, - MATCH_VSUXH_V, - MATCH_VSUXW_V, - MATCH_VSUXE_V, - MATCH_VLBFF_V, - MATCH_VLHFF_V, - MATCH_VLWFF_V, - MATCH_VLEFF_V, - MATCH_VLBUFF_V, - MATCH_VLHUFF_V, - MATCH_VLWUFF_V, - MATCH_VFADD_VF, - MATCH_VFSUB_VF, - MATCH_VFMIN_VF, - MATCH_VFMAX_VF, - MATCH_VFSGNJ_VF, - MATCH_VFSGNJN_VF, - MATCH_VFSGNJX_VF, - MATCH_VFMV_S_F, - MATCH_VFMERGE_VFM, - MATCH_VFMV_V_F, - MATCH_VMFEQ_VF, - MATCH_VMFLE_VF, - MATCH_VMFLT_VF, - MATCH_VMFNE_VF, - MATCH_VMFGT_VF, - MATCH_VMFGE_VF, - MATCH_VFMUL_VF, - MATCH_VFRSUB_VF, - MATCH_VFMADD_VF, - MATCH_VFNMADD_VF, - MATCH_VFMSUB_VF, - MATCH_VFNMSUB_VF, - MATCH_VFMACC_VF, - MATCH_VFNMACC_VF, - MATCH_VFMSAC_VF, - MATCH_VFNMSAC_VF, - MATCH_VFWADD_VF, - MATCH_VFWSUB_VF, - MATCH_VFWADD_WF, - MATCH_VFWSUB_WF, - MATCH_VFWMUL_VF, - MATCH_VFWMACC_VF, - MATCH_VFWNMACC_VF, - MATCH_VFWMSAC_VF, - MATCH_VFWNMSAC_VF, - MATCH_VFADD_VV, - MATCH_VFREDSUM_VS, - MATCH_VFSUB_VV, - MATCH_VFREDOSUM_VS, - MATCH_VFMIN_VV, - MATCH_VFREDMIN_VS, - MATCH_VFMAX_VV, - MATCH_VFREDMAX_VS, - MATCH_VFSGNJ_VV, - MATCH_VFSGNJN_VV, - MATCH_VFSGNJX_VV, - MATCH_VFMV_F_S, - MATCH_VMFEQ_VV, - MATCH_VMFLE_VV, - MATCH_VMFLT_VV, - MATCH_VMFNE_VV, - MATCH_VFMUL_VV, - MATCH_VFMADD_VV, - MATCH_VFNMADD_VV, - MATCH_VFMSUB_VV, - MATCH_VFNMSUB_VV, - MATCH_VFMACC_VV, - MATCH_VFNMACC_VV, - MATCH_VFMSAC_VV, - MATCH_VFNMSAC_VV, - MATCH_VFCVT_XU_F_V, - MATCH_VFCVT_X_F_V, - MATCH_VFCVT_F_XU_V, - MATCH_VFCVT_F_X_V, - MATCH_VFWCVT_XU_F_V, - MATCH_VFWCVT_X_F_V, - MATCH_VFWCVT_F_XU_V, - MATCH_VFWCVT_F_X_V, - MATCH_VFWCVT_F_F_V, - MATCH_VFNCVT_XU_F_W, - MATCH_VFNCVT_X_F_W, - MATCH_VFNCVT_F_XU_W, - MATCH_VFNCVT_F_X_W, - MATCH_VFNCVT_F_F_W, - MATCH_VFCLASS_V, - MATCH_VFWADD_VV, - MATCH_VFWREDSUM_VS, - MATCH_VFWSUB_VV, - MATCH_VFWREDOSUM_VS, - MATCH_VFWADD_WV, - MATCH_VFWSUB_WV, - MATCH_VFWMUL_VV, - MATCH_VFDOT_VV, - MATCH_VFWMACC_VV, - MATCH_VFWNMACC_VV, - MATCH_VFWMSAC_VV, - MATCH_VFWNMSAC_VV, - MATCH_VADD_VX, - MATCH_VSUB_VX, - MATCH_VRSUB_VX, - MATCH_VMINU_VX, - MATCH_VMIN_VX, - MATCH_VMAXU_VX, - MATCH_VMAX_VX, - MATCH_VAND_VX, - MATCH_VOR_VX, - MATCH_VXOR_VX, - MATCH_VSBC_VXM, - MATCH_VMSBC_VXM, - MATCH_VMERGE_VXM, - MATCH_VMV_V_X, - MATCH_VMSEQ_VX, - MATCH_VMSNE_VX, - MATCH_VMSLTU_VX, - MATCH_VMSLT_VX, - MATCH_VMSLEU_VX, - MATCH_VMSLE_VX, - MATCH_VMSGTU_VX, - MATCH_VMSGT_VX, - MATCH_VSADDU_VX, - MATCH_VSADD_VX, - MATCH_VSSUBU_VX, - MATCH_VSSUB_VX, - MATCH_VAADD_VX, - MATCH_VSLL_VX, - MATCH_VASUB_VX, - MATCH_VSMUL_VX, - MATCH_VSRL_VX, - MATCH_VSRA_VX, - MATCH_VSSRL_VX, - MATCH_VSSRA_VX, - MATCH_VNSRL_WX, - MATCH_VNSRA_WX, - MATCH_VNCLIPU_WX, - MATCH_VNCLIP_WX, - MATCH_VQMACCU_VX, - MATCH_VQMACC_VX, - MATCH_VQMACCSU_VX, - MATCH_VQMACCUS_VX, - MATCH_VADD_VV, - MATCH_VSUB_VV, - MATCH_VMINU_VV, - MATCH_VMIN_VV, - MATCH_VMAXU_VV, - MATCH_VMAX_VV, - MATCH_VAND_VV, - MATCH_VOR_VV, - MATCH_VXOR_VV, - MATCH_VSBC_VVM, - MATCH_VMSBC_VVM, - MATCH_VMERGE_VVM, - MATCH_VMV_V_V, - MATCH_VMSEQ_VV, - MATCH_VMSNE_VV, - MATCH_VMSLTU_VV, - MATCH_VMSLT_VV, - MATCH_VMSLEU_VV, - MATCH_VMSLE_VV, - MATCH_VSADDU_VV, - MATCH_VSADD_VV, - MATCH_VSSUBU_VV, - MATCH_VSSUB_VV, - MATCH_VAADD_VV, - MATCH_VSLL_VV, - MATCH_VASUB_VV, - MATCH_VSMUL_VV, - MATCH_VSRL_VV, - MATCH_VSRA_VV, - MATCH_VSSRL_VV, - MATCH_VSSRA_VV, - MATCH_VNSRL_WV, - MATCH_VNSRA_WV, - MATCH_VNCLIPU_WV, - MATCH_VNCLIP_WV, - MATCH_VWREDSUMU_VS, - MATCH_VWREDSUM_VS, - MATCH_VDOTU_VV, - MATCH_VDOT_VV, - MATCH_VQMACCU_VV, - MATCH_VQMACC_VV, - MATCH_VQMACCSU_VV, - MATCH_VADD_VI, - MATCH_VRSUB_VI, - MATCH_VAND_VI, - MATCH_VOR_VI, - MATCH_VXOR_VI, - MATCH_VMERGE_VIM, - MATCH_VMV_V_I, - MATCH_VMSEQ_VI, - MATCH_VMSNE_VI, - MATCH_VMSLEU_VI, - MATCH_VMSLE_VI, - MATCH_VMSGTU_VI, - MATCH_VMSGT_VI, - MATCH_VSADDU_VI, - MATCH_VSADD_VI, - MATCH_VSLL_VI, - MATCH_VSRL_VI, - MATCH_VSRA_VI, - MATCH_VSSRL_VI, - MATCH_VSSRA_VI, - MATCH_VNSRL_WI, - MATCH_VNSRA_WI, - MATCH_VNCLIPU_WI, - MATCH_VNCLIP_WI, - MATCH_VREDSUM_VS, - MATCH_VREDAND_VS, - MATCH_VREDOR_VS, - MATCH_VREDXOR_VS, - MATCH_VREDMINU_VS, - MATCH_VREDMIN_VS, - MATCH_VREDMAXU_VS, - MATCH_VREDMAX_VS, - MATCH_VMV_X_S, - MATCH_VPOPC_M, - MATCH_VFIRST_M, - MATCH_VMANDNOT_MM, - MATCH_VMAND_MM, - MATCH_VMOR_MM, - MATCH_VMXOR_MM, - MATCH_VMORNOT_MM, - MATCH_VMNAND_MM, - MATCH_VMNOR_MM, - MATCH_VMXNOR_MM, - MATCH_VMSBF_M, - MATCH_VMSOF_M, - MATCH_VMSIF_M, - MATCH_VIOTA_M, - MATCH_VID_V, - MATCH_VMULHU_VV, - MATCH_VMUL_VV, - MATCH_VMULHSU_VV, - MATCH_VMULH_VV, - MATCH_VMADD_VV, - MATCH_VNMSUB_VV, - MATCH_VMACC_VV, - MATCH_VNMSAC_VV, - MATCH_VWADDU_VV, - MATCH_VWADD_VV, - MATCH_VWSUBU_VV, - MATCH_VWSUB_VV, - MATCH_VWADDU_WV, - MATCH_VWADD_WV, - MATCH_VWSUBU_WV, - MATCH_VWSUB_WV, - MATCH_VWMULU_VV, - MATCH_VWMULSU_VV, - MATCH_VWMUL_VV, - MATCH_VWMACCU_VV, - MATCH_VWMACC_VV, - MATCH_VWMACCSU_VV, - MATCH_VMV_S_X, - MATCH_VSLIDE1UP_VX, - MATCH_VSLIDE1DOWN_VX, - MATCH_VMULHU_VX, - MATCH_VMUL_VX, - MATCH_VMULHSU_VX, - MATCH_VMULH_VX, - MATCH_VMADD_VX, - MATCH_VNMSUB_VX, - MATCH_VMACC_VX, - MATCH_VNMSAC_VX, - MATCH_VWADDU_VX, - MATCH_VWADD_VX, - MATCH_VWSUBU_VX, - MATCH_VWSUB_VX, - MATCH_VWADDU_WX, - MATCH_VWADD_WX, - MATCH_VWSUBU_WX, - MATCH_VWSUB_WX, - MATCH_VWMULU_VX, - MATCH_VWMULSU_VX, - MATCH_VWMUL_VX, - MATCH_VWMACCU_VX, - MATCH_VWMACC_VX, - MATCH_VWMACCSU_VX, - MATCH_VWMACCUS_VX, - }; - - const uint32_t tbl_1905[] = { - MATCH_VSETVLI, - MATCH_VSETVL, - MATCH_VLW_V, - MATCH_VSW_V, - MATCH_VSLIDEDOWN_VX, - MATCH_VSLIDEDOWN_VI, - MATCH_VSLIDE1DOWN_VX, - MATCH_VFADD_VF, - MATCH_VFSUB_VF, - MATCH_VFMIN_VF, - MATCH_VFMAX_VF, - MATCH_VFSGNJ_VF, - MATCH_VFSGNJN_VF, - MATCH_VFSGNJX_VF, - MATCH_VFMV_S_F, - MATCH_VMFEQ_VF, - MATCH_VMFLE_VF, - MATCH_VMFLT_VF, - MATCH_VMFNE_VF, - MATCH_VMFGT_VF, - MATCH_VMFGE_VF, - MATCH_VFDIV_VF, - MATCH_VFRDIV_VF, - MATCH_VFMUL_VF, - MATCH_VFMADD_VF, - MATCH_VFNMADD_VF, - MATCH_VFMSUB_VF, - MATCH_VFNMSUB_VF, - MATCH_VFMACC_VF, - MATCH_VFNMACC_VF, - MATCH_VFMSAC_VF, - MATCH_VFNMSAC_VF, - MATCH_VFADD_VV, - MATCH_VFSUB_VV, - MATCH_VFMIN_VV, - MATCH_VFMAX_VV, - MATCH_VFSGNJ_VV, - MATCH_VFSGNJN_VV, - MATCH_VFSGNJX_VV, - MATCH_VFMV_F_S, - MATCH_VMFEQ_VV, - MATCH_VMFLE_VV, - MATCH_VMFLT_VV, - MATCH_VMFNE_VV, - MATCH_VFDIV_VV, - MATCH_VFMUL_VV, - MATCH_VFMADD_VV, - MATCH_VFNMADD_VV, - MATCH_VFMSUB_VV, - MATCH_VFNMSUB_VV, - MATCH_VFMACC_VV, - MATCH_VFNMACC_VV, - MATCH_VFMSAC_VV, - MATCH_VFNMSAC_VV, - MATCH_VFSQRT_V, - MATCH_VFCLASS_V, - }; - - for (size_t idx = 0; idx < sizeof(tbl_any)/sizeof(tbl_any[0]); ++idx) { - impl_table[tbl_any[idx]][val_any] = true; - } - - for (size_t idx = 0; idx < sizeof(tbl_e27)/sizeof(tbl_e27[0]); ++idx) { - impl_table[tbl_e27[idx]][val_e27] = true; - } - - for (size_t idx = 0; idx < sizeof(tbl_1905)/sizeof(tbl_1905[0]); ++idx) { - impl_table[tbl_1905[idx]][val_1905] = true; - } -} - void processor_t::set_debug(bool value) { debug = value; diff --git a/riscv/processor.h b/riscv/processor.h index 5690685..cf2fe33 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -10,7 +10,6 @@ #include <vector> #include <unordered_map> #include <map> -#include <unordered_map> #include <cassert> #include "debug_rom_defines.h" @@ -429,8 +428,6 @@ public: reg_t ELEN, VLEN, SLEN; bool vill; - std::unordered_map<uint32_t, std::unordered_map<uint64_t, bool>> impl_table; - // vector element for varies SEW template<class T> T& elt(reg_t vReg, reg_t n, bool is_write = false){ @@ -458,7 +455,9 @@ public: void reset(); - vectorUnit_t(); + vectorUnit_t(){ + reg_file = 0; + } ~vectorUnit_t(){ free(reg_file); diff --git a/riscv/riscv.ac b/riscv/riscv.ac index 020ffbf..22d0d3a 100644 --- a/riscv/riscv.ac +++ b/riscv/riscv.ac @@ -44,8 +44,3 @@ AC_ARG_ENABLE([misaligned], AS_HELP_STRING([--enable-misaligned], [Enable hardwa AS_IF([test "x$enable_misaligned" = "xyes"], [ AC_DEFINE([RISCV_ENABLE_MISALIGNED],,[Enable hardware support for misaligned loads and stores]) ]) - -AC_ARG_ENABLE([impl-check], AS_HELP_STRING([--enable-impl-check], [Enable implementation check])) -AS_IF([test "x$enable_impl_check" = "xyes"], [ - AC_DEFINE([RISCV_ENABLE_IMPL_CHECK],,[Enable implemenation check]) -]) diff --git a/riscv/sim.cc b/riscv/sim.cc index 484f5fb..2649707 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -16,10 +16,6 @@ #include <sys/wait.h> #include <sys/types.h> -#ifdef RISCV_ENABLE_IMPL_CHECK -unsigned g_check_impl = 'a' << 16 | 'n' << 8 | 'y'; -bool g_has_unsupport = false; -#endif bool g_vector_mistrap = false; volatile bool ctrlc_pressed = false; diff --git a/spike_main/spike.cc b/spike_main/spike.cc index e652a33..3812d73 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -32,9 +32,6 @@ static void help(int exit_code = 1) fprintf(stderr, " --isa=<name> RISC-V ISA string [default %s]\n", DEFAULT_ISA); fprintf(stderr, " --priv=<m|mu|msu> RISC-V privilege modes supported [default %s]\n", DEFAULT_PRIV); fprintf(stderr, " --varch=<name> RISC-V Vector uArch string [default %s]\n", DEFAULT_VARCH); -#ifdef RISCV_ENABLE_IMPL_CHECK - fprintf(stderr, " --check-impl Check vector instruction implementation(\"any\", \'1905\", \"e27\")\n"); -#endif fprintf(stderr, " --pc=<address> Override ELF entry point\n"); fprintf(stderr, " --hartids=<a,b,...> Explicitly specify hartids, default is 0,1,...\n"); fprintf(stderr, " --ic=<S>:<W>:<B> Instantiate a cache model with S sets,\n"); @@ -127,16 +124,6 @@ static std::vector<std::pair<reg_t, mem_t*>> make_mems(const char* arg) return res; } -#ifdef RISCV_ENABLE_IMPL_CHECK -extern unsigned g_check_impl; -extern bool g_has_unsupport; -static void exit_with_unsupport(void) -{ - if (g_has_unsupport) { - _Exit(123); - } -} -#endif extern bool g_vector_mistrap; int main(int argc, char** argv) @@ -256,21 +243,6 @@ int main(int argc, char** argv) parser.option(0, "device", 1, device_parser); parser.option(0, "extension", 1, [&](const char* s){extension = find_extension(s);}); parser.option(0, "dump-dts", 0, [&](const char *s){dump_dts = true;}); -#ifdef RISCV_ENABLE_IMPL_CHECK - parser.option(0, "check-impl", 1, [&](const char *s) - { - if (strcmp(s, "any") == 0) - g_check_impl = 'a' << 16 | 'n' << 8 | 'y'; - else if (strcmp(s, "1905") == 0) - g_check_impl = 1905; - else if (strcmp(s, "e27") == 0) - g_check_impl = 'e' << 16 | '2' << 8 | '7'; - else { - fprintf(stderr, "unsupport check-impl value %s\n", s); - exit(1); - } - }); -#endif parser.option(0, "vector-mistrap", 0, [&](const char *s){g_vector_mistrap = true;}); parser.option(0, "disable-dtb", 0, [&](const char *s){dtb_enabled = false;}); parser.option(0, "initrd", 1, [&](const char* s){initrd = s;}); @@ -308,10 +280,6 @@ int main(int argc, char** argv) if (!*argv1) help(); -#ifdef RISCV_ENABLE_IMPL_CHECK - atexit(exit_with_unsupport); -#endif - if (initrd && check_file_exists(initrd)) { initrd_size = get_file_size(initrd); for (auto& m : mems) { |