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-rw-r--r--riscv/encoding.h54
-rw-r--r--riscv/insns/vid_v.h28
-rw-r--r--riscv/insns/viota_m.h51
-rw-r--r--riscv/insns/vmsbf_m.h31
-rw-r--r--riscv/insns/vmsif_m.h34
-rw-r--r--riscv/insns/vmsof_m.h30
-rw-r--r--riscv/insns/vmunary0_vv.h140
-rw-r--r--riscv/riscv.mk.in6
-rw-r--r--spike_main/disasm.cc17
9 files changed, 219 insertions, 172 deletions
diff --git a/riscv/encoding.h b/riscv/encoding.h
index 31cbf18..8a04bc9 100644
--- a/riscv/encoding.h
+++ b/riscv/encoding.h
@@ -866,8 +866,8 @@
#define MASK_VFSGNJN_VF 0xfc00707f
#define MATCH_VFSGNJX_VF 0x28005057
#define MASK_VFSGNJX_VF 0xfc00707f
-#define MATCH_VFMV_S_F 0x34005057
-#define MASK_VFMV_S_F 0xfdf0707f
+#define MATCH_VFMV_S_F 0x36005057
+#define MASK_VFMV_S_F 0xfff0707f
#define MATCH_VFMERGE_VF 0x5c005057
#define MASK_VFMERGE_VF 0xfc00707f
#define MATCH_VFEQ_VF 0x60005057
@@ -946,8 +946,8 @@
#define MASK_VFSGNJN_VV 0xfc00707f
#define MATCH_VFSGNJX_VV 0x28001057
#define MASK_VFSGNJX_VV 0xfc00707f
-#define MATCH_VFMV_F_S 0x30001057
-#define MASK_VFMV_F_S 0xfc0ff07f
+#define MATCH_VFMV_F_S 0x32001057
+#define MASK_VFMV_F_S 0xfe0ff07f
#define MATCH_VFEQ_VV 0x60001057
#define MASK_VFEQ_VV 0xfc00707f
#define MATCH_VFLE_VV 0x64001057
@@ -1032,10 +1032,10 @@
#define MASK_VSLIDEUP_VX 0xfc00707f
#define MATCH_VSLIDEDOWN_VX 0x3c004057
#define MASK_VSLIDEDOWN_VX 0xfc00707f
-#define MATCH_VADC_VX 0x40004057
-#define MASK_VADC_VX 0xfc00707f
-#define MATCH_VSBC_VX 0x48004057
-#define MASK_VSBC_VX 0xfc00707f
+#define MATCH_VADC_VX 0x42004057
+#define MASK_VADC_VX 0xfe00707f
+#define MATCH_VSBC_VX 0x4a004057
+#define MASK_VSBC_VX 0xfe00707f
#define MATCH_VMERGE_VX 0x5c004057
#define MASK_VMERGE_VX 0xfc00707f
#define MATCH_VSEQ_VX 0x60004057
@@ -1114,10 +1114,10 @@
#define MASK_VXOR_VV 0xfc00707f
#define MATCH_VRGATHER_VV 0x30000057
#define MASK_VRGATHER_VV 0xfc00707f
-#define MATCH_VADC_VV 0x40000057
-#define MASK_VADC_VV 0xfc00707f
-#define MATCH_VSBC_VV 0x48000057
-#define MASK_VSBC_VV 0xfc00707f
+#define MATCH_VADC_VV 0x42000057
+#define MASK_VADC_VV 0xfe00707f
+#define MATCH_VSBC_VV 0x4a000057
+#define MASK_VSBC_VV 0xfe00707f
#define MATCH_VMERGE_VV 0x5c000057
#define MASK_VMERGE_VV 0xfc00707f
#define MATCH_VSEQ_VV 0x60000057
@@ -1196,8 +1196,8 @@
#define MASK_VSLIDEUP_VI 0xfc00707f
#define MATCH_VSLIDEDOWN_VI 0x3c003057
#define MASK_VSLIDEDOWN_VI 0xfc00707f
-#define MATCH_VADC_VI 0x40003057
-#define MASK_VADC_VI 0xfc00707f
+#define MATCH_VADC_VI 0x42003057
+#define MASK_VADC_VI 0xfe00707f
#define MATCH_VMERGE_VI 0x5c003057
#define MASK_VMERGE_VI 0xfc00707f
#define MATCH_VSEQ_VI 0x60003057
@@ -1252,14 +1252,12 @@
#define MASK_VREDMAXU_VS 0xfc00707f
#define MATCH_VREDMAX_VS 0x1c002057
#define MASK_VREDMAX_VS 0xfc00707f
-#define MATCH_VEXT_X_V 0x30002057
-#define MASK_VEXT_X_V 0xfc00707f
+#define MATCH_VEXT_X_V 0x32002057
+#define MASK_VEXT_X_V 0xfe00707f
#define MATCH_VMPOPC_M 0x50002057
#define MASK_VMPOPC_M 0xfc00707f
#define MATCH_VMFIRST_M 0x54002057
#define MASK_VMFIRST_M 0xfc00707f
-#define MATCH_VMUNARY0_VV 0x58002057
-#define MASK_VMUNARY0_VV 0xfc00707f
#define MATCH_VCOMPRESS_VM 0x5c002057
#define MASK_VCOMPRESS_VM 0xfc00707f
#define MATCH_VMANDNOT_MM 0x60002057
@@ -1278,6 +1276,16 @@
#define MASK_VMNOR_MM 0xfc00707f
#define MATCH_VMXNOR_MM 0x7c002057
#define MASK_VMXNOR_MM 0xfc00707f
+#define MATCH_VMSBF_M 0x5800a057
+#define MASK_VMSBF_M 0xfc0ff07f
+#define MATCH_VMSOF_M 0x58012057
+#define MASK_VMSOF_M 0xfc0ff07f
+#define MATCH_VMSIF_M 0x5801a057
+#define MASK_VMSIF_M 0xfc0ff07f
+#define MATCH_VIOTA_M 0x58082057
+#define MASK_VIOTA_M 0xfc0ff07f
+#define MATCH_VID_V 0x5808a057
+#define MASK_VID_V 0xfc0ff07f
#define MATCH_VDIVU_VV 0x80002057
#define MASK_VDIVU_VV 0xfc00707f
#define MATCH_VDIV_VV 0x84002057
@@ -1332,8 +1340,8 @@
#define MASK_VWMSACU_VV 0xfc00707f
#define MATCH_VWMSAC_VV 0xfc002057
#define MASK_VWMSAC_VV 0xfc00707f
-#define MATCH_VMV_S_X 0x34006057
-#define MASK_VMV_S_X 0xfc00707f
+#define MATCH_VMV_S_X 0x36006057
+#define MASK_VMV_S_X 0xfe00707f
#define MATCH_VSLIDE1UP_VX 0x38006057
#define MASK_VSLIDE1UP_VX 0xfc00707f
#define MATCH_VSLIDE1DOWN_VX 0x3c006057
@@ -2178,7 +2186,6 @@ DECLARE_INSN(vredmax_vs, MATCH_VREDMAX_VS, MASK_VREDMAX_VS)
DECLARE_INSN(vext_x_v, MATCH_VEXT_X_V, MASK_VEXT_X_V)
DECLARE_INSN(vmpopc_m, MATCH_VMPOPC_M, MASK_VMPOPC_M)
DECLARE_INSN(vmfirst_m, MATCH_VMFIRST_M, MASK_VMFIRST_M)
-DECLARE_INSN(vmunary0_vv, MATCH_VMUNARY0_VV, MASK_VMUNARY0_VV)
DECLARE_INSN(vcompress_vm, MATCH_VCOMPRESS_VM, MASK_VCOMPRESS_VM)
DECLARE_INSN(vmandnot_mm, MATCH_VMANDNOT_MM, MASK_VMANDNOT_MM)
DECLARE_INSN(vmand_mm, MATCH_VMAND_MM, MASK_VMAND_MM)
@@ -2188,6 +2195,11 @@ DECLARE_INSN(vmornot_mm, MATCH_VMORNOT_MM, MASK_VMORNOT_MM)
DECLARE_INSN(vmnand_mm, MATCH_VMNAND_MM, MASK_VMNAND_MM)
DECLARE_INSN(vmnor_mm, MATCH_VMNOR_MM, MASK_VMNOR_MM)
DECLARE_INSN(vmxnor_mm, MATCH_VMXNOR_MM, MASK_VMXNOR_MM)
+DECLARE_INSN(vmsbf_m, MATCH_VMSBF_M, MASK_VMSBF_M)
+DECLARE_INSN(vmsof_m, MATCH_VMSOF_M, MASK_VMSOF_M)
+DECLARE_INSN(vmsif_m, MATCH_VMSIF_M, MASK_VMSIF_M)
+DECLARE_INSN(viota_m, MATCH_VIOTA_M, MASK_VIOTA_M)
+DECLARE_INSN(vid_v, MATCH_VID_V, MASK_VID_V)
DECLARE_INSN(vdivu_vv, MATCH_VDIVU_VV, MASK_VDIVU_VV)
DECLARE_INSN(vdiv_vv, MATCH_VDIV_VV, MASK_VDIV_VV)
DECLARE_INSN(vremu_vv, MATCH_VREMU_VV, MASK_VREMU_VV)
diff --git a/riscv/insns/vid_v.h b/riscv/insns/vid_v.h
new file mode 100644
index 0000000..bd30b8c
--- /dev/null
+++ b/riscv/insns/vid_v.h
@@ -0,0 +1,28 @@
+// vmpopc rd, vs2, vm
+require(p->VU.vsew >= e8 && p->VU.vsew <= e64);
+require(!p->VU.vill);
+reg_t vl = p->VU.vl;
+reg_t sew = p->VU.vsew;
+reg_t rd_num = insn.rd();
+reg_t rs1_num = insn.rs1();
+reg_t rs2_num = insn.rs2();
+require(p->VU.vstart == 0);
+
+for (reg_t i = 0 ; i < P.VU.vl; ++i) {
+ V_LOOP_ELEMENT_SKIP;
+
+ switch (sew) {
+ case e8:
+ P.VU.elt<uint8_t>(rd_num, i) = i;
+ break;
+ case e16:
+ P.VU.elt<uint16_t>(rd_num, i) = i;
+ break;
+ case e32:
+ P.VU.elt<uint32_t>(rd_num, i) = i;
+ break;
+ default:
+ P.VU.elt<uint64_t>(rd_num, i) = i;
+ break;
+ }
+}
diff --git a/riscv/insns/viota_m.h b/riscv/insns/viota_m.h
new file mode 100644
index 0000000..7aae89a
--- /dev/null
+++ b/riscv/insns/viota_m.h
@@ -0,0 +1,51 @@
+// vmpopc rd, vs2, vm
+require(p->VU.vsew >= e8 && p->VU.vsew <= e64);
+require(!p->VU.vill);
+reg_t vl = p->VU.vl;
+reg_t sew = p->VU.vsew;
+reg_t rd_num = insn.rd();
+reg_t rs1_num = insn.rs1();
+reg_t rs2_num = insn.rs2();
+require(p->VU.vstart == 0);
+
+int cnt = 0;
+for (reg_t i = 0 ; i < P.VU.vlmax; ++i) {
+ const int mlen = p->VU.vmlen;
+ const int midx = (mlen * i) / 32;
+ const int mpos = (mlen * i) % 32;
+ const uint32_t mmask = ((1ul << mlen) - 1) << mpos;
+
+ bool vs2_lsb = ((p->VU.elt<uint32_t>(rs2_num, midx ) >> mpos) & 0x1) == 1;
+ bool do_mask = (p->VU.elt<uint32_t>(0, midx) >> mpos) & 0x1;
+ uint32_t &vd = P.VU.elt<uint32_t>(rd_num, midx);
+
+ bool has_one = false;
+ if (insn.v_vm() == 1 || (insn.v_vm() == 0 && do_mask)) {
+ if (vs2_lsb) {
+ has_one = true;
+ }
+ }
+
+ bool use_ori = (insn.v_vm() == 0) && !do_mask;
+ switch (sew) {
+ case e8:
+ P.VU.elt<uint8_t>(rd_num, i) = use_ori ?
+ P.VU.elt<uint8_t>(rs2_num, i) : cnt;
+ break;
+ case e16:
+ P.VU.elt<uint16_t>(rd_num, i) = use_ori ?
+ P.VU.elt<uint16_t>(rs2_num, i) : cnt;
+ break;
+ case e32:
+ P.VU.elt<uint32_t>(rd_num, i) = use_ori ?
+ P.VU.elt<uint32_t>(rs2_num, i) : cnt;
+ break;
+ default:
+ P.VU.elt<uint64_t>(rd_num, i) = use_ori ?
+ P.VU.elt<uint64_t>(rs2_num, i) : cnt;
+ break;
+ }
+
+ if (has_one)
+ cnt++;
+}
diff --git a/riscv/insns/vmsbf_m.h b/riscv/insns/vmsbf_m.h
new file mode 100644
index 0000000..6d9f6a0
--- /dev/null
+++ b/riscv/insns/vmsbf_m.h
@@ -0,0 +1,31 @@
+// vmsbf rd.m, vs2, vm
+require(p->VU.vsew >= e8 && p->VU.vsew <= e64);
+require(!p->VU.vill);
+reg_t vl = p->VU.vl;
+reg_t sew = p->VU.vsew;
+reg_t rd_num = insn.rd();
+reg_t rs1_num = insn.rs1();
+reg_t rs2_num = insn.rs2();
+require(p->VU.vstart == 0);
+
+bool has_one = false;
+for (reg_t i = 0 ; i < P.VU.vlmax; ++i) {
+ const int mlen = p->VU.vmlen;
+ const int midx = (mlen * i) / 32;
+ const int mpos = (mlen * i) % 32;
+ const uint32_t mmask = ((1ul << mlen) - 1) << mpos;
+
+ bool vs2_lsb = ((p->VU.elt<uint32_t>(rs2_num, midx ) >> mpos) & 0x1) == 1;
+ bool do_mask = (p->VU.elt<uint32_t>(0, midx) >> mpos) & 0x1;
+ uint32_t &vd = P.VU.elt<uint32_t>(rd_num, midx);
+
+ if (insn.v_vm() == 1 || (insn.v_vm() == 0 && do_mask)) {
+ int res = 0;
+ if (!has_one && !vs2_lsb) {
+ res = 1;
+ } else if(vs2_lsb) {
+ has_one = true;
+ }
+ vd = (vd & ~mmask) | ((res << mpos) & mmask);
+ }
+}
diff --git a/riscv/insns/vmsif_m.h b/riscv/insns/vmsif_m.h
new file mode 100644
index 0000000..8edace9
--- /dev/null
+++ b/riscv/insns/vmsif_m.h
@@ -0,0 +1,34 @@
+// vmpopc rd, vs2, vm
+require(p->VU.vsew >= e8 && p->VU.vsew <= e64);
+require(!p->VU.vill);
+reg_t vl = p->VU.vl;
+reg_t sew = p->VU.vsew;
+reg_t rd_num = insn.rd();
+reg_t rs1_num = insn.rs1();
+reg_t rs2_num = insn.rs2();
+require(p->VU.vstart == 0);
+
+bool has_one = false;
+for (reg_t i = 0 ; i < P.VU.vlmax; ++i) {
+ const int mlen = p->VU.vmlen;
+ const int midx = (mlen * i) / 32;
+ const int mpos = (mlen * i) % 32;
+ const uint32_t mmask = ((1ul << mlen) - 1) << mpos;
+
+ bool vs2_lsb = ((p->VU.elt<uint32_t>(rs2_num, midx ) >> mpos) & 0x1) == 1;
+ bool do_mask = (p->VU.elt<uint32_t>(0, midx) >> mpos) & 0x1;
+ uint32_t &vd = P.VU.elt<uint32_t>(rd_num, midx);
+
+ if (insn.v_vm() == 1 || (insn.v_vm() == 0 && do_mask)) {
+ int res = 0;
+ if (!has_one && !vs2_lsb) {
+ res = 1;
+ } else if(vs2_lsb) {
+ has_one = true;
+ res = 1;
+ }
+ vd = (vd & ~mmask) | ((res << mpos) & mmask);
+ }
+}
+
+p->VU.vstart = 0;
diff --git a/riscv/insns/vmsof_m.h b/riscv/insns/vmsof_m.h
new file mode 100644
index 0000000..d0a0107
--- /dev/null
+++ b/riscv/insns/vmsof_m.h
@@ -0,0 +1,30 @@
+// vmsof.m rd, vs2, vm
+require(p->VU.vsew >= e8 && p->VU.vsew <= e64);
+require(!p->VU.vill);
+reg_t vl = p->VU.vl;
+reg_t sew = p->VU.vsew;
+reg_t rd_num = insn.rd();
+reg_t rs1_num = insn.rs1();
+reg_t rs2_num = insn.rs2();
+require(p->VU.vstart == 0);
+
+bool has_one = false;
+for (reg_t i = 0 ; i < P.VU.vlmax; ++i) {
+ const int mlen = p->VU.vmlen;
+ const int midx = (mlen * i) / 32;
+ const int mpos = (mlen * i) % 32;
+ const uint32_t mmask = ((1ul << mlen) - 1) << mpos;
+
+ bool vs2_lsb = ((p->VU.elt<uint32_t>(rs2_num, midx ) >> mpos) & 0x1) == 1;
+ bool do_mask = (p->VU.elt<uint32_t>(0, midx) >> mpos) & 0x1;
+ uint32_t &vd = P.VU.elt<uint32_t>(rd_num, midx);
+
+ if (insn.v_vm() == 1 || (insn.v_vm() == 0 && do_mask)) {
+ int res = 0;
+ if(!has_one && vs2_lsb) {
+ has_one = true;
+ res = 1;
+ }
+ vd = (vd & ~mmask) | ((res << mpos) & mmask);
+ }
+}
diff --git a/riscv/insns/vmunary0_vv.h b/riscv/insns/vmunary0_vv.h
deleted file mode 100644
index 35a7b18..0000000
--- a/riscv/insns/vmunary0_vv.h
+++ /dev/null
@@ -1,140 +0,0 @@
-// vmpopc rd, vs2, vm
-require(p->VU.vsew >= e8 && p->VU.vsew <= e64);
-require(!p->VU.vill);
-reg_t vl = p->VU.vl;
-reg_t sew = p->VU.vsew;
-reg_t rd_num = insn.rd();
-reg_t rs1_num = insn.rs1();
-reg_t rs2_num = insn.rs2();
-require(p->VU.vstart == 0);
-
-if (rs1_num == VMUNARY0::VMSBF) {
- bool has_one = false;
- for (reg_t i = 0 ; i < P.VU.vlmax; ++i) {
- const int mlen = p->VU.vmlen;
- const int midx = (mlen * i) / 32;
- const int mpos = (mlen * i) % 32;
- const uint32_t mmask = ((1ul << mlen) - 1) << mpos;
-
- bool vs2_lsb = ((p->VU.elt<uint32_t>(rs2_num, midx ) >> mpos) & 0x1) == 1;
- bool do_mask = (p->VU.elt<uint32_t>(0, midx) >> mpos) & 0x1;
- uint32_t &vd = P.VU.elt<uint32_t>(rd_num, midx);
-
- if (insn.v_vm() == 1 || (insn.v_vm() == 0 && do_mask)) {
- int res = 0;
- if (!has_one && !vs2_lsb) {
- res = 1;
- } else if(vs2_lsb) {
- has_one = true;
- }
- vd = (vd & ~mmask) | ((res << mpos) & mmask);
- }
- }
-} else if (rs1_num == VMUNARY0::VMSOF) {
- bool has_one = false;
- for (reg_t i = 0 ; i < P.VU.vlmax; ++i) {
- const int mlen = p->VU.vmlen;
- const int midx = (mlen * i) / 32;
- const int mpos = (mlen * i) % 32;
- const uint32_t mmask = ((1ul << mlen) - 1) << mpos;
-
- bool vs2_lsb = ((p->VU.elt<uint32_t>(rs2_num, midx ) >> mpos) & 0x1) == 1;
- bool do_mask = (p->VU.elt<uint32_t>(0, midx) >> mpos) & 0x1;
- uint32_t &vd = P.VU.elt<uint32_t>(rd_num, midx);
-
- if (insn.v_vm() == 1 || (insn.v_vm() == 0 && do_mask)) {
- int res = 0;
- if(!has_one && vs2_lsb) {
- has_one = true;
- res = 1;
- }
- vd = (vd & ~mmask) | ((res << mpos) & mmask);
- }
- }
-
-} else if (rs1_num == VMUNARY0::VMSIF) {
- bool has_one = false;
- for (reg_t i = 0 ; i < P.VU.vlmax; ++i) {
- const int mlen = p->VU.vmlen;
- const int midx = (mlen * i) / 32;
- const int mpos = (mlen * i) % 32;
- const uint32_t mmask = ((1ul << mlen) - 1) << mpos;
-
- bool vs2_lsb = ((p->VU.elt<uint32_t>(rs2_num, midx ) >> mpos) & 0x1) == 1;
- bool do_mask = (p->VU.elt<uint32_t>(0, midx) >> mpos) & 0x1;
- uint32_t &vd = P.VU.elt<uint32_t>(rd_num, midx);
-
- if (insn.v_vm() == 1 || (insn.v_vm() == 0 && do_mask)) {
- int res = 0;
- if (!has_one && !vs2_lsb) {
- res = 1;
- } else if(vs2_lsb) {
- has_one = true;
- res = 1;
- }
- vd = (vd & ~mmask) | ((res << mpos) & mmask);
- }
- }
-} else if (rs1_num == VMUNARY0::VMIOTA) {
- int cnt = 0;
- for (reg_t i = 0 ; i < P.VU.vlmax; ++i) {
- const int mlen = p->VU.vmlen;
- const int midx = (mlen * i) / 32;
- const int mpos = (mlen * i) % 32;
- const uint32_t mmask = ((1ul << mlen) - 1) << mpos;
-
- bool vs2_lsb = ((p->VU.elt<uint32_t>(rs2_num, midx ) >> mpos) & 0x1) == 1;
- bool do_mask = (p->VU.elt<uint32_t>(0, midx) >> mpos) & 0x1;
- uint32_t &vd = P.VU.elt<uint32_t>(rd_num, midx);
-
- bool has_one = false;
- if (insn.v_vm() == 1 || (insn.v_vm() == 0 && do_mask)) {
- if (vs2_lsb) {
- has_one = true;
- }
- }
-
- bool use_ori = (insn.v_vm() == 0) && !do_mask;
- switch (sew) {
- case e8:
- P.VU.elt<uint8_t>(rd_num, i) = use_ori ?
- P.VU.elt<uint8_t>(rs2_num, i) : cnt;
- break;
- case e16:
- P.VU.elt<uint16_t>(rd_num, i) = use_ori ?
- P.VU.elt<uint16_t>(rs2_num, i) : cnt;
- break;
- case e32:
- P.VU.elt<uint32_t>(rd_num, i) = use_ori ?
- P.VU.elt<uint32_t>(rs2_num, i) : cnt;
- break;
- default:
- P.VU.elt<uint64_t>(rd_num, i) = use_ori ?
- P.VU.elt<uint64_t>(rs2_num, i) : cnt;
- break;
- }
-
- if (has_one)
- cnt++;
- }
-} else if (rs1_num == VMUNARY0::VID) {
- for (reg_t i = 0 ; i < P.VU.vl; ++i) {
- V_LOOP_ELEMENT_SKIP;
-
- switch (sew) {
- case e8:
- P.VU.elt<uint8_t>(rd_num, i) = i;
- break;
- case e16:
- P.VU.elt<uint16_t>(rd_num, i) = i;
- break;
- case e32:
- P.VU.elt<uint32_t>(rd_num, i) = i;
- break;
- default:
- P.VU.elt<uint64_t>(rd_num, i) = i;
- break;
- }
- }
-}
-p->VU.vstart = 0;
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index 98f7cdc..1485e8c 100644
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -314,6 +314,8 @@ riscv_insn_ext_v_alu_int = \
vdot_vv \
vdotu_vv \
vext_x_v \
+ vid_v \
+ viota_m \
vmacc_vv \
vmacc_vx \
vmadd_vv \
@@ -339,6 +341,9 @@ riscv_insn_ext_v_alu_int = \
vmpopc_m \
vmsac_vv \
vmsac_vx \
+ vmsbf_m \
+ vmsif_m \
+ vmsof_m \
vmsub_vv \
vmsub_vx \
vmul_vv \
@@ -349,7 +354,6 @@ riscv_insn_ext_v_alu_int = \
vmulhsu_vx \
vmulhu_vv \
vmulhu_vx \
- vmunary0_vv \
vmv_s_x \
vmxnor_mm \
vmxor_mm \
diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc
index bf537b0..4e556ba 100644
--- a/spike_main/disasm.cc
+++ b/spike_main/disasm.cc
@@ -902,17 +902,14 @@ disassembler_t::disassembler_t(int xlen)
//0b01_0000
DISASM_INSN("vmpopc.m", vmpopc_m, 0, {&xrd, &vs2, &opt, &vm});
+ //vmuary0
DISASM_INSN("vmfirst.m", vmfirst_m, 0, {&xrd, &vs2, &opt, &vm});
- add_insn(new disasm_insn_t("vmsbf.m", match_vmunary0_vv | (0x01ul << 15),
- mask_vmunary0_vv | mask_rs1, {&vd, &vs2, &opt, &vm}));
- add_insn(new disasm_insn_t("vmsof.m", match_vmunary0_vv | (0x02ul << 15),
- mask_vmunary0_vv | mask_rs1, {&vd, &vs2, &opt, &vm}));
- add_insn(new disasm_insn_t("vmsif.m", match_vmunary0_vv | (0x03ul << 15),
- mask_vmunary0_vv | mask_rs1, {&vd, &vs2, &opt, &vm}));
- add_insn(new disasm_insn_t("vmiota.m", match_vmunary0_vv | (0x10ul << 15),
- mask_vmunary0_vv | mask_rs1, {&vd, &vs2, &opt, &vm}));
- add_insn(new disasm_insn_t("vid.m", match_vmunary0_vv | (0x11ul << 15),
- mask_vmunary0_vv | mask_rs1, {&vd, &opt, &vm}));
+ DISASM_INSN("vmsbf.m", vmsbf_m, 0, {&xrd, &vs2, &opt, &vm});
+ DISASM_INSN("vmsof.m", vmsof_m, 0, {&xrd, &vs2, &opt, &vm});
+ DISASM_INSN("vmsif.m", vmsif_m, 0, {&xrd, &vs2, &opt, &vm});
+ DISASM_INSN("viota.m", viota_m, 0, {&xrd, &vs2, &opt, &vm});
+ DISASM_INSN("vid.v", vid_v, 0, {&xrd, &vs2, &opt, &vm});
+
DISASM_INSN("vcompress.vm", vcompress_vm, 0, {&vd, &vs2, &opt, &vm});
DISASM_OPIV_M___INSN(vmandnot, 1);
generated by cgit v1.1 at 2024-08-06 21:21:14 +0000