diff options
| -rw-r--r-- | riscv/processor.cc | 15 | ||||
| -rw-r--r-- | riscv/processor.h | 2 |
2 files changed, 14 insertions, 3 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index 583affb..1700fba 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -211,7 +211,7 @@ void vectorUnit_t::reset(){ set_vl(-1, 0, -1); // default to illegal configuration } -reg_t vectorUnit_t::set_vl(uint64_t regId, reg_t reqVL, reg_t newType){ +reg_t vectorUnit_t::set_vl(int regId, reg_t reqVL, reg_t newType){ if (vtype != newType){ vtype = newType; vsew = 1 << (BITS(newType, 4, 2) + 3); @@ -227,7 +227,18 @@ reg_t vectorUnit_t::set_vl(uint64_t regId, reg_t reqVL, reg_t newType){ vtype = UINT64_MAX << (p->get_xlen() - 1); } } - vl = vlmax == 0 ? vlmax : (reqVL <= vlmax && regId != 0) ? reqVL : vlmax; + + // set vl + if (vlmax == 0) { + vl = 0; + } else if (regId == 0) { + vl = vl > vlmax ? 0 : vl; + } else if (regId == -1) { + vl = vlmax; + } else if (regId >= 0) { + vl = reqVL > vlmax ? vlmax : reqVL; + } + vstart = 0; setvl_count++; return vl; diff --git a/riscv/processor.h b/riscv/processor.h index 1591645..ef0319f 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -196,7 +196,7 @@ class vectorUnit_t { reg_file = 0; } - reg_t set_vl(uint64_t regId, reg_t reqVL, reg_t newType); + reg_t set_vl(int regId, reg_t reqVL, reg_t newType); reg_t get_vlen() { return VLEN; } reg_t get_elen() { return ELEN; } |