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-rw-r--r--riscv/insns/c_ebreak.h2
-rw-r--r--riscv/insns/ebreak.h2
-rw-r--r--riscv/trap.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/riscv/insns/c_ebreak.h b/riscv/insns/c_ebreak.h
index 128b86b..a17200f 100644
--- a/riscv/insns/c_ebreak.h
+++ b/riscv/insns/c_ebreak.h
@@ -1,2 +1,2 @@
require_extension('C');
-throw trap_breakpoint(pc);
+throw trap_breakpoint();
diff --git a/riscv/insns/ebreak.h b/riscv/insns/ebreak.h
index 736cebe..c22776c 100644
--- a/riscv/insns/ebreak.h
+++ b/riscv/insns/ebreak.h
@@ -1 +1 @@
-throw trap_breakpoint(pc);
+throw trap_breakpoint();
diff --git a/riscv/trap.h b/riscv/trap.h
index b5b8a50..ac048eb 100644
--- a/riscv/trap.h
+++ b/riscv/trap.h
@@ -47,7 +47,7 @@ class mem_trap_t : public trap_t
DECLARE_MEM_TRAP(CAUSE_MISALIGNED_FETCH, instruction_address_misaligned)
DECLARE_MEM_TRAP(CAUSE_FETCH_ACCESS, instruction_access_fault)
DECLARE_MEM_TRAP(CAUSE_ILLEGAL_INSTRUCTION, illegal_instruction)
-DECLARE_MEM_TRAP(CAUSE_BREAKPOINT, breakpoint)
+DECLARE_TRAP(CAUSE_BREAKPOINT, breakpoint)
DECLARE_MEM_TRAP(CAUSE_MISALIGNED_LOAD, load_address_misaligned)
DECLARE_MEM_TRAP(CAUSE_MISALIGNED_STORE, store_address_misaligned)
DECLARE_MEM_TRAP(CAUSE_LOAD_ACCESS, load_access_fault)