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-rw-r--r--riscv/decode.h107
-rw-r--r--riscv/insns/vcompress_vm.h2
-rw-r--r--riscv/insns/vfmerge_vfm.h1
-rw-r--r--riscv/insns/vfmv_s_f.h7
-rw-r--r--riscv/insns/vfmv_v_f.h1
-rw-r--r--riscv/insns/vid_v.h1
-rw-r--r--riscv/insns/viota_m.h1
-rw-r--r--riscv/insns/vleff_v.h17
-rw-r--r--riscv/insns/vmsbf_m.h1
-rw-r--r--riscv/insns/vmsif_m.h1
-rw-r--r--riscv/insns/vmsof_m.h1
-rw-r--r--riscv/insns/vmv_s_x.h20
-rw-r--r--riscv/insns/vsuxb_v.h19
-rw-r--r--riscv/insns/vsuxe_v.h21
-rw-r--r--riscv/insns/vsuxh_v.h16
-rw-r--r--riscv/insns/vsuxw_v.h11
16 files changed, 41 insertions, 186 deletions
diff --git a/riscv/decode.h b/riscv/decode.h
index 0feb7ab..0f12262 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -65,29 +65,6 @@ const int NCSR = 4096;
#define MAX_INSN_LENGTH 8
#define PC_ALIGN 2
-#ifndef TAIL_ZEROING
- #define TAIL_ZEROING true
-#else
- #define TAIL_ZEROING false
-#endif
-
-#ifdef WORDS_BIGENDIAN
- // Elements are stored in opposite order, see comment in processor.h
- #define TAIL_ZERO(x) \
- uint8_t *tail = &P.VU.elt<uint8_t>(rd_num, vl * (x) - 1); \
- memset(tail - (P.VU.vlmax - vl) * (x), 0, (P.VU.vlmax - vl) * (x));
- #define TAIL_ZERO_REDUCTION(x) \
- uint8_t *tail = (uint8_t *)&P.VU.elt<type_sew_t<x>::type>(rd_num, 0); \
- memset(tail - ((P.VU.get_vlen() - x) >> 3), 0, (P.VU.get_vlen() - x) >> 3);
-#else
- #define TAIL_ZERO(x) \
- uint8_t *tail = &P.VU.elt<uint8_t>(rd_num, vl * (x)); \
- memset(tail, 0, (P.VU.vlmax - vl) * (x));
- #define TAIL_ZERO_REDUCTION(x) \
- uint8_t *tail = (uint8_t *)&P.VU.elt<type_sew_t<x>::type>(rd_num, 1); \
- memset(tail, 0, (P.VU.get_vlen() - x) >> 3);
-#endif
-
typedef uint64_t insn_bits_t;
class insn_t
{
@@ -368,9 +345,7 @@ inline long double to_f(float128_t f){long double r; memcpy(&r, &f, sizeof(r));
}
#define VI_ELEMENT_SKIP(inx) \
- if (inx >= vl && TAIL_ZEROING) { \
- is_valid = false; \
- } else if (inx >= vl && !TAIL_ZEROING) { \
+ if (inx >= vl) { \
continue; \
} else if (inx < P.VU.vstart) { \
continue; \
@@ -436,52 +411,22 @@ static inline bool is_overlaped(const int astart, const int asize,
reg_t rs2_num = insn.rs2(); \
for (reg_t i=P.VU.vstart; i<vl; ++i){
-#define VI_TAIL_ZERO(elm) \
- if (vl != 0 && vl < P.VU.vlmax && TAIL_ZEROING) { \
- TAIL_ZERO((sew >> 3) * elm); \
- }
-
-#define VI_TAIL_ZERO_MASK(dst) \
- if (vl != 0 && TAIL_ZEROING){ \
- for (reg_t i=vl; i<P.VU.vlmax; ++i){ \
- const int mlen = P.VU.vmlen; \
- const int midx = (mlen * i) / 64; \
- const int mpos = (mlen * i) % 64; \
- uint64_t mmask = (UINT64_MAX << (64 - mlen)) >> (64 - mlen - mpos); \
- uint64_t &vdi = P.VU.elt<uint64_t>(dst, midx); \
- vdi = (vdi & ~mmask);\
- }\
- }\
-
#define VI_LOOP_BASE \
VI_GENERAL_LOOP_BASE \
VI_LOOP_ELEMENT_SKIP();
#define VI_LOOP_END \
} \
- if (vl != 0 && vl < P.VU.vlmax && TAIL_ZEROING){ \
- TAIL_ZERO((sew >> 3) * 1); \
- }\
- P.VU.vstart = 0;
-
-#define VI_LOOP_END_NO_TAIL_ZERO \
- } \
P.VU.vstart = 0;
#define VI_LOOP_WIDEN_END \
} \
- if (vl != 0 && vl < P.VU.vlmax && TAIL_ZEROING){ \
- TAIL_ZERO((sew >> 3) * 2); \
- }\
P.VU.vstart = 0;
#define VI_LOOP_REDUCTION_END(x) \
} \
if (vl > 0) { \
vd_0_des = vd_0_res; \
- if (TAIL_ZEROING) { \
- TAIL_ZERO_REDUCTION(x); \
- } \
} \
P.VU.vstart = 0;
@@ -502,7 +447,6 @@ static inline bool is_overlaped(const int astart, const int asize,
#define VI_LOOP_CMP_END \
vdi = (vdi & ~mmask) | (((res) << mpos) & mmask); \
} \
- VI_TAIL_ZERO_MASK(rd_num); \
P.VU.vstart = 0;
#define VI_LOOP_MASK(op) \
@@ -518,17 +462,6 @@ static inline bool is_overlaped(const int astart, const int asize,
uint64_t &res = P.VU.elt<uint64_t>(insn.rd(), midx); \
res = (res & ~mmask) | ((op) & (1ULL << mpos)); \
} \
- \
- if (TAIL_ZEROING) {\
- for (reg_t i = vl; i < P.VU.vlmax && i > 0; ++i) { \
- int mlen = P.VU.vmlen; \
- int midx = (mlen * i) / 64; \
- int mpos = (mlen * i) % 64; \
- uint64_t mmask = (UINT64_MAX << (64 - mlen)) >> (64 - mlen - mpos); \
- uint64_t &res = P.VU.elt<uint64_t>(insn.rd(), midx); \
- res = (res & ~mmask); \
- } \
- } \
P.VU.vstart = 0;
#define VI_LOOP_NSHIFT_BASE \
@@ -1307,7 +1240,6 @@ VI_LOOP_END
BODY; \
} \
} \
- VI_TAIL_ZERO_MASK(rd_num);
#define VI_XI_LOOP_CARRY(BODY) \
VI_LOOP_BASE \
@@ -1325,7 +1257,6 @@ VI_LOOP_END
BODY; \
} \
} \
- VI_TAIL_ZERO_MASK(rd_num);
// average loop
#define VI_VVX_LOOP_AVG(opd, op) \
@@ -1409,11 +1340,8 @@ for (reg_t i = 0; i < vlmax; ++i) { \
const reg_t vlmax = P.VU.vlmax; \
const reg_t vlmul = P.VU.vlmul; \
for (reg_t i = 0; i < vlmax && vl != 0; ++i) { \
- bool is_valid = true; \
VI_STRIP(i) \
VI_ELEMENT_SKIP(i); \
- if (!is_valid) \
- continue; \
for (reg_t fn = 0; fn < nf; ++fn) { \
st_width##_t val = 0; \
switch (P.VU.vsew) { \
@@ -1445,11 +1373,10 @@ for (reg_t i = 0; i < vlmax; ++i) { \
const reg_t vlmax = P.VU.vlmax; \
const reg_t vlmul = P.VU.vlmul; \
for (reg_t i = 0; i < vlmax && vl != 0; ++i) { \
- bool is_valid = true; \
VI_ELEMENT_SKIP(i); \
VI_STRIP(i); \
for (reg_t fn = 0; fn < nf; ++fn) { \
- ld_width##_t val = is_valid ? MMU.load_##ld_width(baseAddr + (stride) + (offset) * elt_byte) : 0; \
+ ld_width##_t val = MMU.load_##ld_width(baseAddr + (stride) + (offset) * elt_byte); \
if (vd + fn >= NVPR){ \
P.VU.vstart = vreg_inx;\
require(false); \
@@ -1485,7 +1412,6 @@ for (reg_t i = 0; i < vlmax; ++i) { \
const reg_t vlmax = P.VU.vlmax; \
const reg_t vlmul = P.VU.vlmul; \
for (reg_t i = 0; i < vlmax && vl != 0; ++i) { \
- bool is_valid = true; \
VI_STRIP(i); \
VI_ELEMENT_SKIP(i); \
\
@@ -1494,20 +1420,20 @@ for (reg_t i = 0; i < vlmax; ++i) { \
\
switch (sew) { \
case e8: \
- p->VU.elt<uint8_t>(rd_num + fn * vlmul, vreg_inx) = is_valid ? val : 0; \
+ p->VU.elt<uint8_t>(rd_num + fn * vlmul, vreg_inx) = val; \
break; \
case e16: \
- p->VU.elt<uint16_t>(rd_num + fn * vlmul, vreg_inx) = is_valid ? val : 0; \
+ p->VU.elt<uint16_t>(rd_num + fn * vlmul, vreg_inx) = val; \
break; \
case e32: \
- p->VU.elt<uint32_t>(rd_num + fn * vlmul, vreg_inx) = is_valid ? val : 0; \
+ p->VU.elt<uint32_t>(rd_num + fn * vlmul, vreg_inx) = val; \
break; \
case e64: \
- p->VU.elt<uint64_t>(rd_num + fn * vlmul, vreg_inx) = is_valid ? val : 0; \
+ p->VU.elt<uint64_t>(rd_num + fn * vlmul, vreg_inx) = val; \
break; \
} \
\
- if (val == 0 && is_valid) { \
+ if (val == 0) { \
p->VU.vl = i; \
early_stop = true; \
break; \
@@ -1568,16 +1494,10 @@ for (reg_t i = 0; i < vlmax; ++i) { \
#define VI_VFP_LOOP_END \
} \
- if (vl != 0 && vl < P.VU.vlmax && TAIL_ZEROING){ \
- TAIL_ZERO((P.VU.vsew >> 3) * 1); \
- }\
P.VU.vstart = 0; \
#define VI_VFP_LOOP_WIDE_END \
} \
- if (vl != 0 && vl < P.VU.vlmax && TAIL_ZEROING){ \
- TAIL_ZERO((P.VU.vsew >> 3) * 2); \
- }\
P.VU.vstart = 0; \
set_fp_exceptions;
@@ -1587,9 +1507,6 @@ for (reg_t i = 0; i < vlmax; ++i) { \
set_fp_exceptions; \
if (vl > 0) { \
P.VU.elt<type_sew_t<x>::type>(rd_num, 0) = vd_0.v; \
- if (TAIL_ZEROING) { \
- TAIL_ZERO_REDUCTION(x); \
- } \
}
#define VI_VFP_LOOP_CMP_END \
@@ -1605,16 +1522,6 @@ for (reg_t i = 0; i < vlmax; ++i) { \
break; \
}; \
} \
- if (vl != 0 && TAIL_ZEROING){ \
- for (reg_t i=vl; i<P.VU.vlmax; ++i){ \
- const int mlen = P.VU.vmlen; \
- const int midx = (mlen * i) / 64; \
- const int mpos = (mlen * i) % 64; \
- uint64_t mmask = (UINT64_MAX << (64 - mlen)) >> (64 - mlen - mpos); \
- uint64_t &vdi = P.VU.elt<uint64_t>(insn.rd(), midx); \
- vdi = (vdi & ~mmask);\
- }\
- }\
P.VU.vstart = 0; \
set_fp_exceptions;
diff --git a/riscv/insns/vcompress_vm.h b/riscv/insns/vcompress_vm.h
index b056b0e..91d6e90 100644
--- a/riscv/insns/vcompress_vm.h
+++ b/riscv/insns/vcompress_vm.h
@@ -34,7 +34,7 @@ for (reg_t i = P.VU.vstart ; i < vl; ++i) {
}
}
-if (vl > 0 && TAIL_ZEROING) {
+if (vl > 0 && P.VU.TZ) {
uint8_t *tail = &P.VU.elt<uint8_t>(rd_num, pos * ((sew >> 3) * 1));
memset(tail, 0, (P.VU.vlmax - pos) * ((sew >> 3) * 1));
}
diff --git a/riscv/insns/vfmerge_vfm.h b/riscv/insns/vfmerge_vfm.h
index 6d12bce..e8601fe 100644
--- a/riscv/insns/vfmerge_vfm.h
+++ b/riscv/insns/vfmerge_vfm.h
@@ -20,6 +20,5 @@ for (reg_t i=P.VU.vstart; i<vl; ++i) {
vd = use_first ? rs1 : vs2;
}
-VI_TAIL_ZERO(1);
P.VU.vstart = 0;
set_fp_exceptions;
diff --git a/riscv/insns/vfmv_s_f.h b/riscv/insns/vfmv_s_f.h
index a08282f..8ff6094 100644
--- a/riscv/insns/vfmv_s_f.h
+++ b/riscv/insns/vfmv_s_f.h
@@ -15,12 +15,5 @@ if (vl > 0) {
else
P.VU.elt<uint32_t>(rd_num, 0) = f32(FRS1).v;
- if (TAIL_ZEROING) {
- const reg_t max_len = P.VU.VLEN / sew;
- for (reg_t i = 1; i < max_len; ++i) {
- P.VU.elt<uint32_t>(rd_num, i) = 0;
- }
- }
-
vl = 0;
}
diff --git a/riscv/insns/vfmv_v_f.h b/riscv/insns/vfmv_v_f.h
index c85a3e9..150298b 100644
--- a/riscv/insns/vfmv_v_f.h
+++ b/riscv/insns/vfmv_v_f.h
@@ -15,6 +15,5 @@ for (reg_t i=P.VU.vstart; i<vl; ++i) {
vd = rs1;
}
-VI_TAIL_ZERO(1);
P.VU.vstart = 0;
set_fp_exceptions;
diff --git a/riscv/insns/vid_v.h b/riscv/insns/vid_v.h
index df6dd04..2291495 100644
--- a/riscv/insns/vid_v.h
+++ b/riscv/insns/vid_v.h
@@ -26,5 +26,4 @@ for (reg_t i = P.VU.vstart ; i < P.VU.vl; ++i) {
}
}
-VI_TAIL_ZERO(1);
P.VU.vstart = 0;
diff --git a/riscv/insns/viota_m.h b/riscv/insns/viota_m.h
index fde0291..55d8df1 100644
--- a/riscv/insns/viota_m.h
+++ b/riscv/insns/viota_m.h
@@ -49,4 +49,3 @@ for (reg_t i = 0; i < vl; ++i) {
}
}
-VI_TAIL_ZERO(1);
diff --git a/riscv/insns/vleff_v.h b/riscv/insns/vleff_v.h
index ec2777a..7b870ca 100644
--- a/riscv/insns/vleff_v.h
+++ b/riscv/insns/vleff_v.h
@@ -9,7 +9,6 @@ const reg_t rd_num = insn.rd();
bool early_stop = false;
const reg_t vlmul = P.VU.vlmul;
for (reg_t i = 0; i < P.VU.vlmax && vl != 0; ++i) {
- bool is_valid = true;
bool is_zero = false;
VI_STRIP(i);
VI_ELEMENT_SKIP(i);
@@ -20,23 +19,23 @@ for (reg_t i = 0; i < P.VU.vlmax && vl != 0; ++i) {
switch (sew) {
case e8:
P.VU.elt<uint8_t>(rd_num + fn * vlmul, vreg_inx) =
- is_valid ? MMU.load_uint8(baseAddr + (i * nf + fn) * 1) : 0;
- is_zero = is_valid && P.VU.elt<uint8_t>(rd_num + fn * vlmul, vreg_inx) == 0;
+ MMU.load_uint8(baseAddr + (i * nf + fn) * 1);
+ is_zero = P.VU.elt<uint8_t>(rd_num + fn * vlmul, vreg_inx) == 0;
break;
case e16:
P.VU.elt<uint16_t>(rd_num + fn * vlmul, vreg_inx) =
- is_valid ? MMU.load_uint16(baseAddr + (i * nf + fn) * 2) : 0;
- is_zero = is_valid && P.VU.elt<uint16_t>(rd_num + fn * vlmul, vreg_inx) == 0;
+ MMU.load_uint16(baseAddr + (i * nf + fn) * 2);
+ is_zero = P.VU.elt<uint16_t>(rd_num + fn * vlmul, vreg_inx) == 0;
break;
case e32:
P.VU.elt<uint32_t>(rd_num + fn * vlmul, vreg_inx) =
- is_valid ? MMU.load_uint32(baseAddr + (i * nf + fn) * 4) : 0;
- is_zero = is_valid && P.VU.elt<uint32_t>(rd_num + fn * vlmul, vreg_inx) == 0;
+ MMU.load_uint32(baseAddr + (i * nf + fn) * 4);
+ is_zero = P.VU.elt<uint32_t>(rd_num + fn * vlmul, vreg_inx) == 0;
break;
case e64:
P.VU.elt<uint64_t>(rd_num + fn * vlmul, vreg_inx) =
- is_valid ? MMU.load_uint64(baseAddr + (i * nf + fn) * 8) : 0;
- is_zero = is_valid && P.VU.elt<uint64_t>(rd_num + fn * vlmul, vreg_inx) == 0;
+ MMU.load_uint64(baseAddr + (i * nf + fn) * 8);
+ is_zero = P.VU.elt<uint64_t>(rd_num + fn * vlmul, vreg_inx) == 0;
break;
}
diff --git a/riscv/insns/vmsbf_m.h b/riscv/insns/vmsbf_m.h
index 3047cca..443fcbb 100644
--- a/riscv/insns/vmsbf_m.h
+++ b/riscv/insns/vmsbf_m.h
@@ -30,5 +30,4 @@ for (reg_t i = P.VU.vstart; i < vl; ++i) {
}
}
-VI_TAIL_ZERO_MASK(rd_num);
P.VU.vstart = 0;
diff --git a/riscv/insns/vmsif_m.h b/riscv/insns/vmsif_m.h
index 826e7cd..381088b 100644
--- a/riscv/insns/vmsif_m.h
+++ b/riscv/insns/vmsif_m.h
@@ -30,5 +30,4 @@ for (reg_t i = P.VU.vstart ; i < vl; ++i) {
}
}
-VI_TAIL_ZERO_MASK(rd_num);
P.VU.vstart = 0;
diff --git a/riscv/insns/vmsof_m.h b/riscv/insns/vmsof_m.h
index 48805f7..d66002d 100644
--- a/riscv/insns/vmsof_m.h
+++ b/riscv/insns/vmsof_m.h
@@ -28,5 +28,4 @@ for (reg_t i = P.VU.vstart ; i < vl; ++i) {
}
}
-VI_TAIL_ZERO_MASK(rd_num);
P.VU.vstart = 0;
diff --git a/riscv/insns/vmv_s_x.h b/riscv/insns/vmv_s_x.h
index f19fa61..948b5be 100644
--- a/riscv/insns/vmv_s_x.h
+++ b/riscv/insns/vmv_s_x.h
@@ -24,25 +24,5 @@ if (vl > 0) {
break;
}
- if (TAIL_ZEROING) {
- const reg_t max_len = P.VU.VLEN / sew;
- for (reg_t i = 1; i < max_len; ++i) {
- switch(sew) {
- case e8:
- P.VU.elt<uint8_t>(rd_num, i) = 0;
- break;
- case e16:
- P.VU.elt<uint16_t>(rd_num, i) = 0;
- break;
- case e32:
- P.VU.elt<uint32_t>(rd_num, i) = 0;
- break;
- default:
- P.VU.elt<uint64_t>(rd_num, i) = 0;
- break;
- }
- }
- }
-
vl = 0;
}
diff --git a/riscv/insns/vsuxb_v.h b/riscv/insns/vsuxb_v.h
index cf928f8..0dfe024 100644
--- a/riscv/insns/vsuxb_v.h
+++ b/riscv/insns/vsuxb_v.h
@@ -8,30 +8,25 @@ reg_t vs3 = insn.rd();
reg_t vlmax = P.VU.vlmax;
VI_DUPLICATE_VREG(stride, vlmax);
for (reg_t i = 0; i < vlmax && vl != 0; ++i) {
- bool is_valid = true;
VI_ELEMENT_SKIP(i);
VI_STRIP(i)
switch (P.VU.vsew) {
case e8:
- if (is_valid)
- MMU.store_uint8(baseAddr + index[i],
- P.VU.elt<uint8_t>(vs3, vreg_inx));
+ MMU.store_uint8(baseAddr + index[i],
+ P.VU.elt<uint8_t>(vs3, vreg_inx));
break;
case e16:
- if (is_valid)
- MMU.store_uint8(baseAddr + index[i],
- P.VU.elt<uint16_t>(vs3, vreg_inx));
+ MMU.store_uint8(baseAddr + index[i],
+ P.VU.elt<uint16_t>(vs3, vreg_inx));
break;
case e32:
- if (is_valid)
- MMU.store_uint8(baseAddr + index[i],
+ MMU.store_uint8(baseAddr + index[i],
P.VU.elt<uint32_t>(vs3, vreg_inx));
break;
case e64:
- if (is_valid)
- MMU.store_uint8(baseAddr + index[i],
- P.VU.elt<uint64_t>(vs3, vreg_inx));
+ MMU.store_uint8(baseAddr + index[i],
+ P.VU.elt<uint64_t>(vs3, vreg_inx));
break;
}
}
diff --git a/riscv/insns/vsuxe_v.h b/riscv/insns/vsuxe_v.h
index 8bd7545..5e4d3a2 100644
--- a/riscv/insns/vsuxe_v.h
+++ b/riscv/insns/vsuxe_v.h
@@ -9,30 +9,25 @@ reg_t vs3 = insn.rd();
reg_t vlmax = P.VU.vlmax;
VI_DUPLICATE_VREG(stride, vlmax);
for (reg_t i = 0; i < vlmax && vl != 0; ++i) {
- bool is_valid = true;
VI_ELEMENT_SKIP(i);
VI_STRIP(i)
switch (sew) {
case e8:
- if (is_valid)
- MMU.store_uint8(baseAddr + index[i],
- P.VU.elt<uint8_t>(vs3, vreg_inx));
+ MMU.store_uint8(baseAddr + index[i],
+ P.VU.elt<uint8_t>(vs3, vreg_inx));
break;
case e16:
- if (is_valid)
- MMU.store_uint16(baseAddr + index[i],
- P.VU.elt<uint16_t>(vs3, vreg_inx));
+ MMU.store_uint16(baseAddr + index[i],
+ P.VU.elt<uint16_t>(vs3, vreg_inx));
break;
case e32:
- if (is_valid)
- MMU.store_uint32(baseAddr + index[i],
- P.VU.elt<uint32_t>(vs3, vreg_inx));
+ MMU.store_uint32(baseAddr + index[i],
+ P.VU.elt<uint32_t>(vs3, vreg_inx));
break;
case e64:
- if (is_valid)
- MMU.store_uint64(baseAddr + index[i],
- P.VU.elt<uint64_t>(vs3, vreg_inx));
+ MMU.store_uint64(baseAddr + index[i],
+ P.VU.elt<uint64_t>(vs3, vreg_inx));
break;
}
}
diff --git a/riscv/insns/vsuxh_v.h b/riscv/insns/vsuxh_v.h
index 1d5a1bd..c6f8be4 100644
--- a/riscv/insns/vsuxh_v.h
+++ b/riscv/insns/vsuxh_v.h
@@ -8,25 +8,21 @@ reg_t vs3 = insn.rd();
reg_t vlmax = P.VU.vlmax;
VI_DUPLICATE_VREG(stride, vlmax);
for (reg_t i = 0; i < vlmax && vl != 0; ++i) {
- bool is_valid = true;
VI_ELEMENT_SKIP(i);
VI_STRIP(i)
switch (P.VU.vsew) {
case e16:
- if (is_valid)
- MMU.store_uint16(baseAddr + index[i],
- P.VU.elt<uint16_t>(vs3, vreg_inx));
+ MMU.store_uint16(baseAddr + index[i],
+ P.VU.elt<uint16_t>(vs3, vreg_inx));
break;
case e32:
- if (is_valid)
- MMU.store_uint16(baseAddr + index[i],
- P.VU.elt<uint32_t>(vs3, vreg_inx));
+ MMU.store_uint16(baseAddr + index[i],
+ P.VU.elt<uint32_t>(vs3, vreg_inx));
break;
case e64:
- if (is_valid)
- MMU.store_uint16(baseAddr + index[i],
- P.VU.elt<uint64_t>(vs3, vreg_inx));
+ MMU.store_uint16(baseAddr + index[i],
+ P.VU.elt<uint64_t>(vs3, vreg_inx));
break;
}
}
diff --git a/riscv/insns/vsuxw_v.h b/riscv/insns/vsuxw_v.h
index ec1a8fe..f133e77 100644
--- a/riscv/insns/vsuxw_v.h
+++ b/riscv/insns/vsuxw_v.h
@@ -8,20 +8,17 @@ reg_t vs3 = insn.rd();
reg_t vlmax = P.VU.vlmax;
VI_DUPLICATE_VREG(stride, vlmax);
for (reg_t i = 0; i < vlmax && vl != 0; ++i) {
- bool is_valid = true;
VI_ELEMENT_SKIP(i);
VI_STRIP(i)
switch (P.VU.vsew) {
case e32:
- if (is_valid)
- MMU.store_uint32(baseAddr + index[i],
- P.VU.elt<uint32_t>(vs3, vreg_inx));
+ MMU.store_uint32(baseAddr + index[i],
+ P.VU.elt<uint32_t>(vs3, vreg_inx));
break;
case e64:
- if (is_valid)
- MMU.store_uint32(baseAddr + index[i],
- P.VU.elt<uint64_t>(vs3, vreg_inx));
+ MMU.store_uint32(baseAddr + index[i],
+ P.VU.elt<uint64_t>(vs3, vreg_inx));
break;
}
}
generated by cgit v1.1 at 2024-08-06 18:05:32 +0000