diff options
| -rw-r--r-- | riscv/mmu.cc | 6 | ||||
| -rw-r--r-- | riscv/mmu.h | 2 |
2 files changed, 7 insertions, 1 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index 489aeee..aa62b90 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -60,7 +60,11 @@ pte_t mmu_t::walk(reg_t addr) { pte_t pte = 0; - if(!vm_enabled) + // the address must be a canonical sign-extended VA_BITS-bit number + int shift = 8*sizeof(reg_t) - VA_BITS; + if (((sreg_t)addr << shift >> shift) != addr) + ; + else if(!vm_enabled) { if(addr < memsz) pte = PTE_E | PTE_PERM | ((addr >> PGSHIFT) << PTE_PPN_SHIFT); diff --git a/riscv/mmu.h b/riscv/mmu.h index 0c61a77..f6ca972 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -15,7 +15,9 @@ const reg_t LEVELS = sizeof(pte_t) == sizeof(uint64_t) ? 3 : 2; const reg_t PGSHIFT = 13; const reg_t PGSIZE = 1 << PGSHIFT; const reg_t PTIDXBITS = PGSHIFT - (sizeof(pte_t) == 8 ? 3 : 2); +const reg_t VPN_BITS = PTIDXBITS * LEVELS; const reg_t PPN_BITS = 8*sizeof(reg_t) - PGSHIFT; +const reg_t VA_BITS = VPN_BITS + PGSHIFT; // page table entry (PTE) fields #define PTE_T 0x001 // Entry is a page Table descriptor |