diff options
| -rw-r--r-- | fesvr/htif.cc | 2 | ||||
| -rw-r--r-- | riscv/devices.h | 1 | ||||
| -rw-r--r-- | riscv/dts.cc | 1 | ||||
| -rw-r--r-- | riscv/encoding.h | 8 | ||||
| -rw-r--r-- | riscv/platform.h | 11 | ||||
| -rw-r--r-- | riscv/processor.cc | 1 | ||||
| -rw-r--r-- | riscv/sim.cc | 1 |
7 files changed, 17 insertions, 8 deletions
diff --git a/fesvr/htif.cc b/fesvr/htif.cc index 4f34cec..1a9d0fc 100644 --- a/fesvr/htif.cc +++ b/fesvr/htif.cc @@ -3,7 +3,7 @@ #include "htif.h" #include "rfb.h" #include "elfloader.h" -#include "encoding.h" +#include "platform.h" #include "byteorder.h" #include <algorithm> #include <assert.h> diff --git a/riscv/devices.h b/riscv/devices.h index 187f220..9200f29 100644 --- a/riscv/devices.h +++ b/riscv/devices.h @@ -4,6 +4,7 @@ #include "decode.h" #include "mmio_plugin.h" #include "abstract_device.h" +#include "platform.h" #include <map> #include <vector> #include <utility> diff --git a/riscv/dts.cc b/riscv/dts.cc index 93e72f3..632dc57 100644 --- a/riscv/dts.cc +++ b/riscv/dts.cc @@ -2,6 +2,7 @@ #include "dts.h" #include "libfdt.h" +#include "platform.h" #include <iostream> #include <sstream> #include <signal.h> diff --git a/riscv/encoding.h b/riscv/encoding.h index 55088d6..7c02e14 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -1,6 +1,6 @@ /* * This file is auto-generated by running 'make ../riscv-isa-sim/riscv/encoding.h' in - * https://github.com/riscv/riscv-opcodes (e8f0392) + * https://github.com/riscv/riscv-opcodes (7d1a0e3) */ /* See LICENSE for license details. */ @@ -211,12 +211,6 @@ #define IRQ_COP 12 #define IRQ_HOST 13 -#define DEFAULT_RSTVEC 0x00001000 -#define CLINT_BASE 0x02000000 -#define CLINT_SIZE 0x000c0000 -#define EXT_IO_BASE 0x40000000 -#define DRAM_BASE 0x80000000 - /* page table entry (PTE) fields */ #define PTE_V 0x001 /* Valid */ #define PTE_R 0x002 /* Read */ diff --git a/riscv/platform.h b/riscv/platform.h new file mode 100644 index 0000000..abe36c0 --- /dev/null +++ b/riscv/platform.h @@ -0,0 +1,11 @@ +// See LICENSE for license details. +#ifndef _RISCV_PLATFORM_H +#define _RISCV_PLATFROM_H + +#define DEFAULT_RSTVEC 0x00001000 +#define CLINT_BASE 0x02000000 +#define CLINT_SIZE 0x000c0000 +#define EXT_IO_BASE 0x40000000 +#define DRAM_BASE 0x80000000 + +#endif diff --git a/riscv/processor.cc b/riscv/processor.cc index 569b5fc..9b6fe12 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -8,6 +8,7 @@ #include "simif.h" #include "mmu.h" #include "disasm.h" +#include "platform.h" #include <cinttypes> #include <cmath> #include <cstdlib> diff --git a/riscv/sim.cc b/riscv/sim.cc index e9e61c5..1418af4 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -5,6 +5,7 @@ #include "dts.h" #include "remote_bitbang.h" #include "byteorder.h" +#include "platform.h" #include <fstream> #include <map> #include <iostream> |