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-rw-r--r--riscv/debug_module.h4
-rw-r--r--riscv/gdbserver.cc51
-rw-r--r--riscv/mmu.cc9
-rw-r--r--riscv/processor.cc1
4 files changed, 31 insertions, 34 deletions
diff --git a/riscv/debug_module.h b/riscv/debug_module.h
index 7a78ad3..53b32db 100644
--- a/riscv/debug_module.h
+++ b/riscv/debug_module.h
@@ -16,11 +16,9 @@ class debug_module_t : public abstract_device_t
uint32_t ram_read32(unsigned int index);
void set_interrupt(uint32_t hartid) {
- fprintf(stderr, "set debug interrupt 0x%x\n", hartid);
interrupt.insert(hartid);
}
void clear_interrupt(uint32_t hartid) {
- fprintf(stderr, "clear debug interrupt 0x%x\n", hartid);
interrupt.erase(hartid);
}
bool get_interrupt(uint32_t hartid) const {
@@ -28,11 +26,9 @@ class debug_module_t : public abstract_device_t
}
void set_halt_notification(uint32_t hartid) {
- fprintf(stderr, "set debug halt_notification 0x%x\n", hartid);
halt_notification.insert(hartid);
}
void clear_halt_notification(uint32_t hartid) {
- fprintf(stderr, "clear debug halt_notification 0x%x\n", hartid);
halt_notification.erase(hartid);
}
bool get_halt_notification(uint32_t hartid) const {
diff --git a/riscv/gdbserver.cc b/riscv/gdbserver.cc
index 0337950..cbdde48 100644
--- a/riscv/gdbserver.cc
+++ b/riscv/gdbserver.cc
@@ -22,6 +22,15 @@
//////////////////////////////////////// Utility Functions
+#undef DEBUG
+#ifdef DEBUG
+# define D(x) x
+#else
+# define D(x)
+#endif // DEBUG
+
+const int debug_gdbserver = 0;
+
void die(const char* msg)
{
fprintf(stderr, "gdbserver code died: %s\n", msg);
@@ -304,7 +313,7 @@ class halt_op_t : public operation_t
gs.mstatus = ((uint64_t) gs.read_debug_ram(3) << 32) | gs.read_debug_ram(2);
gs.write_debug_ram(0, csrr(S0, CSR_DCSR));
gs.write_debug_ram(1, sd(S0, 0, (uint16_t) DEBUG_RAM_START + 16));
- gs.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME - (DEBUG_RAM_START + 4*6))));
+ gs.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME - (DEBUG_RAM_START + 4*2))));
gs.set_interrupt(0);
return false;
@@ -605,15 +614,16 @@ class memory_read_op_t : public operation_t
for (unsigned int i = 0; i < access_size; i++) {
if (data) {
*(data++) = value & 0xff;
- fprintf(stderr, "%02x", (unsigned int) (value & 0xff));
+ D(fprintf(stderr, "%02x", (unsigned int) (value & 0xff)));
} else {
sprintf(buffer, "%02x", (unsigned int) (value & 0xff));
gs.send(buffer);
}
value >>= 8;
}
- if (data)
- fprintf(stderr, "\n");
+ if (data && debug_gdbserver) {
+ D(fprintf(stderr, "\n"));
+ }
length -= access_size;
paddr += access_size;
@@ -655,11 +665,12 @@ class memory_write_op_t : public operation_t
if (step == 0) {
access_size = find_access_size(paddr, length);
- fprintf(stderr, "write to 0x%lx -> 0x%lx (access=%d): ", vaddr, paddr,
- access_size);
- for (unsigned int i = 0; i < length; i++)
- fprintf(stderr, "%02x", data[i]);
- fprintf(stderr, "\n");
+ D(fprintf(stderr, "write to 0x%lx -> 0x%lx (access=%d): ", vaddr, paddr,
+ access_size));
+ for (unsigned int i = 0; i < length; i++) {
+ D(fprintf(stderr, "%02x", data[i]));
+ }
+ D(fprintf(stderr, "\n"));
// address goes in S0
gs.write_debug_ram(0, ld(S0, 0, (uint16_t) DEBUG_RAM_START + 16));
@@ -805,7 +816,7 @@ class collect_translation_info_op_t : public operation_t
case STATE_READ_PTE:
gs.pte_cache[pte_addr] = ((uint64_t) gs.read_debug_ram(5) << 32) |
gs.read_debug_ram(4);
- fprintf(stderr, "pte_cache[0x%lx] = 0x%lx\n", pte_addr, gs.pte_cache[pte_addr]);
+ D(fprintf(stderr, "pte_cache[0x%lx] = 0x%lx\n", pte_addr, gs.pte_cache[pte_addr]));
break;
}
@@ -973,7 +984,7 @@ reg_t gdbserver_t::translate(reg_t vaddr)
reg_t vpn = vaddr >> PGSHIFT;
reg_t paddr = (ppn | (vpn & ((reg_t(1) << ptshift) - 1))) << PGSHIFT;
paddr += vaddr & (PGSIZE-1);
- fprintf(stderr, "gdbserver translate 0x%lx -> 0x%lx\n", vaddr, paddr);
+ D(fprintf(stderr, "gdbserver translate 0x%lx -> 0x%lx\n", vaddr, paddr));
return paddr;
}
}
@@ -1080,11 +1091,11 @@ void gdbserver_t::write()
// Client can't take any more data right now.
break;
} else {
- fprintf(stderr, "wrote %ld bytes: ", bytes);
+ D(fprintf(stderr, "wrote %ld bytes: ", bytes));
for (unsigned int i = 0; i < bytes; i++) {
- fprintf(stderr, "%c", send_buf[i]);
+ D(fprintf(stderr, "%c", send_buf[i]));
}
- fprintf(stderr, "\n");
+ D(fprintf(stderr, "\n"));
send_buf.consume(bytes);
}
}
@@ -1142,7 +1153,7 @@ void gdbserver_t::process_requests()
}
if (packet.empty() && b == 3) {
- fprintf(stderr, "Received interrupt\n");
+ D(fprintf(stderr, "Received interrupt\n"));
recv_buf.consume(1);
handle_interrupt();
break;
@@ -1463,7 +1474,7 @@ void gdbserver_t::handle_query(const std::vector<uint8_t> &packet)
return end_packet();
}
- fprintf(stderr, "Unsupported query %s\n", name.c_str());
+ D(fprintf(stderr, "Unsupported query %s\n", name.c_str()));
return send_packet("");
}
@@ -1477,8 +1488,8 @@ void gdbserver_t::handle_packet(const std::vector<uint8_t> &packet)
return;
}
- fprintf(stderr, "Received %ld-byte packet from debug client: ", packet.size());
- print_packet(packet);
+ D(fprintf(stderr, "Received %ld-byte packet from debug client: ", packet.size()));
+ D(print_packet(packet));
send("+");
switch (packet[1]) {
@@ -1513,8 +1524,8 @@ void gdbserver_t::handle_packet(const std::vector<uint8_t> &packet)
}
// Not supported.
- fprintf(stderr, "** Unsupported packet: ");
- print_packet(packet);
+ D(fprintf(stderr, "** Unsupported packet: "));
+ D(print_packet(packet));
send_packet("");
}
diff --git a/riscv/mmu.cc b/riscv/mmu.cc
index e44c027..eb8fed5 100644
--- a/riscv/mmu.cc
+++ b/riscv/mmu.cc
@@ -117,7 +117,6 @@ void mmu_t::refill_tlb(reg_t vaddr, reg_t paddr, access_type type)
reg_t mmu_t::walk(reg_t addr, access_type type, bool supervisor, bool pum)
{
- fprintf(stderr, "walk 0x%lx\n", addr);
int levels, ptidxbits, ptesize;
switch (get_field(proc->get_state()->mstatus, MSTATUS_VM))
{
@@ -131,7 +130,6 @@ reg_t mmu_t::walk(reg_t addr, access_type type, bool supervisor, bool pum)
int va_bits = PGSHIFT + levels * ptidxbits;
reg_t mask = (reg_t(1) << (proc->xlen - (va_bits-1))) - 1;
reg_t masked_msbs = (addr >> (va_bits-1)) & mask;
- fprintf(stderr, "walk masked_msbs=0x%lx, mask=0x%lx\n", masked_msbs, mask);
if (masked_msbs != 0 && masked_msbs != mask)
return -1;
@@ -142,7 +140,6 @@ reg_t mmu_t::walk(reg_t addr, access_type type, bool supervisor, bool pum)
// check that physical address of PTE is legal
reg_t pte_addr = base + idx * ptesize;
- fprintf(stderr, "pte_addr=0x%lx\n", pte_addr);
if (!sim->addr_is_mem(pte_addr))
break;
@@ -150,16 +147,11 @@ reg_t mmu_t::walk(reg_t addr, access_type type, bool supervisor, bool pum)
reg_t pte = ptesize == 4 ? *(uint32_t*)ppte : *(uint64_t*)ppte;
reg_t ppn = pte >> PTE_PPN_SHIFT;
- fprintf(stderr, "pte=0x%lx\n", pte);
-
if (PTE_TABLE(pte)) { // next level of page table
base = ppn << PGSHIFT;
} else if (pum && PTE_CHECK_PERM(pte, 0, type == STORE, type == FETCH)) {
- fprintf(stderr, "pum fail\n");
break;
} else if (!PTE_CHECK_PERM(pte, supervisor, type == STORE, type == FETCH)) {
- fprintf(stderr, "perm(0x%lx, %d, %d, %d)\n",
- pte, supervisor, type==STORE, type==FETCH);
break;
} else {
// set referenced and possibly dirty bits.
@@ -167,7 +159,6 @@ reg_t mmu_t::walk(reg_t addr, access_type type, bool supervisor, bool pum)
// for superpage mappings, make a fake leaf PTE for the TLB's benefit.
reg_t vpn = addr >> PGSHIFT;
reg_t value = (ppn | (vpn & ((reg_t(1) << ptshift) - 1))) << PGSHIFT;
- fprintf(stderr, " -> 0x%lx\n", value);
return value;
}
}
diff --git a/riscv/processor.cc b/riscv/processor.cc
index 652d7c9..b120ddb 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -198,7 +198,6 @@ void processor_t::set_privilege(reg_t prv)
void processor_t::enter_debug_mode(uint8_t cause)
{
- fprintf(stderr, "enter_debug_mode(%d), mstatus=0x%lx, prv=0x%lx\n", cause, state.mstatus, state.prv);
state.dcsr.cause = cause;
state.dcsr.prv = state.prv;
set_privilege(PRV_M);
generated by cgit v1.1 at 2024-09-12 06:13:14 +0000