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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-11-27 01:08:31 -0800 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-11-27 19:50:20 -0800 |
| commit | d799fd0c9cf4999774f0258e67bc88c72134e4b2 (patch) | |
| tree | e88fa9f83d6642a5e749f8309f0339c819469b2e /spike_main | |
| parent | 58ba609f7cc8ef93597ac207b21af19a9fe392a4 (diff) | |
| download | spike-d799fd0c9cf4999774f0258e67bc88c72134e4b2.zip spike-d799fd0c9cf4999774f0258e67bc88c72134e4b2.tar.gz spike-d799fd0c9cf4999774f0258e67bc88c72134e4b2.tar.bz2 | |
rvv: add whole register load/store, vl1r.v/vs1r.v
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'spike_main')
| -rw-r--r-- | spike_main/disasm.cc | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index bc0ca0f..373c6bb 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -767,17 +767,17 @@ disassembler_t::disassembler_t(int xlen) {"vssseg%dw.v", {&vs3, &v_address, &xrs2, &opt, &vm}}, {"vssseg%de.v", {&vs3, &v_address, &xrs2, &opt, &vm}}, - {"vlseg%db.v", {&vd, &v_address, &vs2, &opt, &vm}}, - {"vlseg%dh.v", {&vd, &v_address, &vs2, &opt, &vm}}, - {"vlseg%dw.v", {&vd, &v_address, &vs2, &opt, &vm}}, - {"vlseg%de.v", {&vd, &v_address, &vs2, &opt, &vm}}, - {"vlseg%dwu.v",{&vd, &v_address, &vs2, &opt, &vm}}, - {"vlseg%dhu.v",{&vd, &v_address, &vs2, &opt, &vm}}, - {"vlseg%dbu.v",{&vd, &v_address, &vs2, &opt, &vm}}, - {"vsseg%db.v", {&vs3, &v_address, &vs2, &opt, &vm}}, - {"vsseg%dh.v", {&vs3, &v_address, &vs2, &opt, &vm}}, - {"vsseg%dw.v", {&vs3, &v_address, &vs2, &opt, &vm}}, - {"vsseg%de.v", {&vs3, &v_address, &vs2, &opt, &vm}}, + {"vlxseg%db.v", {&vd, &v_address, &vs2, &opt, &vm}}, + {"vlxseg%dh.v", {&vd, &v_address, &vs2, &opt, &vm}}, + {"vlxseg%dw.v", {&vd, &v_address, &vs2, &opt, &vm}}, + {"vlxseg%de.v", {&vd, &v_address, &vs2, &opt, &vm}}, + {"vlxseg%dwu.v",{&vd, &v_address, &vs2, &opt, &vm}}, + {"vlxseg%dhu.v",{&vd, &v_address, &vs2, &opt, &vm}}, + {"vlxseg%dbu.v",{&vd, &v_address, &vs2, &opt, &vm}}, + {"vsxseg%db.v", {&vs3, &v_address, &vs2, &opt, &vm}}, + {"vsxseg%dh.v", {&vs3, &v_address, &vs2, &opt, &vm}}, + {"vsxseg%dw.v", {&vs3, &v_address, &vs2, &opt, &vm}}, + {"vsxseg%de.v", {&vs3, &v_address, &vs2, &opt, &vm}}, {"vlseg%dbff.v", {&vd, &v_address, &opt, &vm}}, {"vlseg%dhff.v", {&vd, &v_address, &opt, &vm}}, |