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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-04-24 00:20:26 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-04-24 00:22:29 -0700 |
| commit | 8bde6429b8b271d33ea889bee16b14cd61f2ce6c (patch) | |
| tree | 76705e0d76b0e9f05c32b4c90860ee2092dd09df /spike_main | |
| parent | 5ea03e63bcb4b5cdb83c342aa3c7fdf44206a1d4 (diff) | |
| download | spike-8bde6429b8b271d33ea889bee16b14cd61f2ce6c.zip spike-8bde6429b8b271d33ea889bee16b14cd61f2ce6c.tar.gz spike-8bde6429b8b271d33ea889bee16b14cd61f2ce6c.tar.bz2 | |
rvv: disas: add vfunary0/1
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'spike_main')
| -rw-r--r-- | spike_main/disasm.cc | 28 |
1 files changed, 26 insertions, 2 deletions
diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index afcce42..a892b56 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -981,6 +981,19 @@ disassembler_t::disassembler_t(int xlen) add_insn(new disasm_insn_t(#name ".vf", match_##name##_vf, mask_##name##_vf, \ {&vd, &vs2, &frs1, &opt, &vm})); \ + #define DISASM_VFUNARY0_INSN(name, pre, extra) \ + add_insn(new disasm_insn_t(#name "cvt.xu.f.v", match_vfunary0_vv | ((pre << 3) | 0x0ul) << 15, \ + mask_vfunary0_vv, {&vd, &vs2, &opt, &vm})); \ + add_insn(new disasm_insn_t(#name "cvt.x.f.v", match_vfunary0_vv | ((pre << 3) | 0x1ul) << 15, \ + mask_vfunary0_vv, {&vd, &vs2, &opt, &vm})); \ + add_insn(new disasm_insn_t(#name "cvt.f.xu.v", match_vfunary0_vv | ((pre << 3) | 0x2ul) << 15, \ + mask_vfunary0_vv, {&vd, &vs2, &opt, &vm})); \ + add_insn(new disasm_insn_t(#name "cvt.f.x.v", match_vfunary0_vv | ((pre << 3) | 0x3ul) << 15, \ + mask_vfunary0_vv, {&vd, &vs2, &opt, &vm})); \ + if (extra) \ + add_insn(new disasm_insn_t(#name "cvt.f.f.v", match_vfunary0_vv | ((pre << 3) | 0x4ul) << 15, \ + mask_vfunary0_vv, {&vd, &vs2, &opt, &vm})); + //OPFVV/OPFVF //0b01_0000 DISASM_OPIV_VF_INSN(vfadd); @@ -1010,8 +1023,18 @@ disassembler_t::disassembler_t(int xlen) //0b10_0000 DISASM_OPIV_VF_INSN(vfdiv); DISASM_OPIV__F_INSN(vfrdiv); - DISASM_OPIV_V__INSN(vfunary0); - DISASM_OPIV_V__INSN(vfunary1); + + //vfunary0 + DISASM_VFUNARY0_INSN(vf, 0x0, 0); + DISASM_VFUNARY0_INSN(vfw, 0x1, 1); + DISASM_VFUNARY0_INSN(vfn, 0x2, 1); + + //vfunary1 + add_insn(new disasm_insn_t("vfsqrt.v", match_vfunary1_vv, mask_vfunary1_vv, \ + {&vd, &vs2, &opt, &vm})); + add_insn(new disasm_insn_t("vfclass.v", match_vfunary1_vv, mask_vfunary1_vv, \ + {&vd, &vs2, &opt, &vm})); + DISASM_OPIV_VF_INSN(vfmul); DISASM_OPIV_VF_INSN(vfmadd); DISASM_OPIV_VF_INSN(vfnmadd); @@ -1041,6 +1064,7 @@ disassembler_t::disassembler_t(int xlen) #undef DISASM_OPIV__F_INSN #undef DISASM_OPIV_S__INSN #undef DISASM_OPIV_W__INSN + #undef DISASM_VFUNARY0_INSN if (xlen == 32) { DISASM_INSN("c.flw", c_flw, 0, {&rvc_fp_rs2s, &rvc_lw_address}); |