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| author | Andrew Waterman <andrew@sifive.com> | 2017-09-24 20:25:34 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-09-24 20:25:34 -0700 |
| commit | bd85811c35ea38180d27440507fc222d585ef780 (patch) | |
| tree | 214c6b615d7775f73da5ff9a94bd4a0a2772f9cf /softfloat/f64_classify.c | |
| parent | b86f2a51f522f020ad0d90f598f4c501f41da232 (diff) | |
| download | spike-bd85811c35ea38180d27440507fc222d585ef780.zip spike-bd85811c35ea38180d27440507fc222d585ef780.tar.gz spike-bd85811c35ea38180d27440507fc222d585ef780.tar.bz2 | |
Update SoftFloat
Diffstat (limited to 'softfloat/f64_classify.c')
| -rwxr-xr-x | softfloat/f64_classify.c | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/softfloat/f64_classify.c b/softfloat/f64_classify.c index 2ec124b..180abde 100755 --- a/softfloat/f64_classify.c +++ b/softfloat/f64_classify.c @@ -17,17 +17,20 @@ uint_fast16_t f64_classify( float64_t a ) uint_fast16_t infOrNaN = expF64UI( uiA ) == 0x7FF; uint_fast16_t subnormalOrZero = expF64UI( uiA ) == 0; bool sign = signF64UI( uiA ); + bool fracZero = fracF64UI( uiA ) == 0; + bool isNaN = isNaNF64UI( uiA ); + bool isSNaN = softfloat_isSigNaNF64UI( uiA ); return - ( sign && infOrNaN && fracF64UI( uiA ) == 0 ) << 0 | - ( sign && !infOrNaN && !subnormalOrZero ) << 1 | - ( sign && subnormalOrZero && fracF64UI( uiA ) ) << 2 | - ( sign && subnormalOrZero && fracF64UI( uiA ) == 0 ) << 3 | - ( !sign && infOrNaN && fracF64UI( uiA ) == 0 ) << 7 | - ( !sign && !infOrNaN && !subnormalOrZero ) << 6 | - ( !sign && subnormalOrZero && fracF64UI( uiA ) ) << 5 | - ( !sign && subnormalOrZero && fracF64UI( uiA ) == 0 ) << 4 | - ( isNaNF64UI( uiA ) && softfloat_isSigNaNF64UI( uiA )) << 8 | - ( isNaNF64UI( uiA ) && !softfloat_isSigNaNF64UI( uiA )) << 9; + ( sign && infOrNaN && fracZero ) << 0 | + ( sign && !infOrNaN && !subnormalOrZero ) << 1 | + ( sign && subnormalOrZero && !fracZero ) << 2 | + ( sign && subnormalOrZero && fracZero ) << 3 | + ( !sign && infOrNaN && fracZero ) << 7 | + ( !sign && !infOrNaN && !subnormalOrZero ) << 6 | + ( !sign && subnormalOrZero && !fracZero ) << 5 | + ( !sign && subnormalOrZero && fracZero ) << 4 | + ( isNaN && isSNaN ) << 8 | + ( isNaN && !isSNaN ) << 9; } |