rvv: disasm: add v-spec 0.7.1 support

support most of vector instruction except for AMO extension

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>

3 files changed, 39 insertions, 3 deletions

diff --git a/riscv/decode.h b/riscv/decode.h
index 3fa78c1..7ea1532 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -26,6 +26,7 @@ typedef uint64_t reg_t;
 
 const int NXPR = 32;
 const int NFPR = 32;
+const int NVPR = 32;
 const int NCSR = 4096;
 
 #define X_RA 1
@@ -101,6 +102,15 @@ public:
   uint64_t rvc_rs2() { return x(2, 5); }
   uint64_t rvc_rs1s() { return 8 + x(7, 3); }
   uint64_t rvc_rs2s() { return 8 + x(2, 3); }
+
+  uint64_t v_vm() { return x(25, 1); }
+  uint64_t v_nf() { return x(29, 3); }
+  uint64_t v_simm5() { return xs(15, 5); }
+  uint64_t v_zimm5() { return x(15, 5); }
+  uint64_t v_zimm11() { return x(20, 11); }
+  uint64_t v_lmul() { return 1 << x(20, 2); }
+  uint64_t v_sew() { return 1 << (x(22, 3) + 3); }
+
 private:
   insn_bits_t b;
   uint64_t x(int lo, int len) { return (b >> lo) & ((insn_bits_t(1) << len)-1); }
diff --git a/riscv/disasm.h b/riscv/disasm.h
index 4c1726f..d322731 100644
--- a/riscv/disasm.h
+++ b/riscv/disasm.h
@@ -10,6 +10,7 @@
 
 extern const char* xpr_name[NXPR];
 extern const char* fpr_name[NFPR];
+extern const char* vr_name[NVPR];
 extern const char* csr_name(int which);
 
 class arg_t
@@ -19,6 +20,13 @@ class arg_t
   virtual ~arg_t() {}
 };
 
+// Indicates that the next arg (only) is optional.
+// If the result of converting the next arg to a string is ""
+// then it will not be printed.
+struct : public arg_t {
+  std::string to_string(insn_t insn) const { return ""; }
+} opt;
+
 class disasm_insn_t
 {
  public:
@@ -41,10 +49,21 @@ class disasm_insn_t
 
     if (args.size())
     {
+      bool next_arg_optional  = false;
       s << std::string(std::max(1, 8 - len), ' ');
-      for (size_t i = 0; i < args.size()-1; i++)
-        s << args[i]->to_string(insn) << ", ";
-      s << args[args.size()-1]->to_string(insn);
+      for (size_t i = 0; i < args.size(); i++) {
+        if (args[i] == &opt) {
+          next_arg_optional = true;
+          continue;
+        }
+        std::string argString = args[i]->to_string(insn);
+        if (next_arg_optional) {
+          next_arg_optional = false;
+          if (argString.empty()) continue;
+        }
+        if (i != 0) s << ", ";
+        s << argString;
+      }
     }
     return s.str();
   }
diff --git a/riscv/regnames.cc b/riscv/regnames.cc
index 0bf8d9c..0a7fd4d 100644
--- a/riscv/regnames.cc
+++ b/riscv/regnames.cc
@@ -16,6 +16,13 @@ const char* fpr_name[] = {
   "fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11"
 };
 
+const char* vr_name[] = {
+  "v0",  "v1",  "v2",  "v3",  "v4",  "v5",  "v6",  "v7",
+  "v8",  "v9",  "v10", "v11", "v12", "v13", "v14", "v15",
+  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
+  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31"
+};
+
 const char* csr_name(int which) {
   switch (which) {
     #define DECLARE_CSR(name, number)  case number: return #name;