rvv: refine ld_index

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>

5 files changed, 14 insertions, 98 deletions

diff --git a/riscv/decode.h b/riscv/decode.h
index c9b33fe..fac0fe3 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -1571,7 +1571,7 @@ for (reg_t i = 0; i < P.VU.vlmax && P.VU.vl != 0; ++i) { \
   } \
   P.VU.vstart = 0;
 
-#define VI_LD_INDEX(stride, offset, ld_width, is_seg) \
+#define VI_LD_INDEX(elt_width, is_seg) \
   VI_CHECK_LD_INDEX; \
   const reg_t nf = insn.v_nf() + 1; \
   const reg_t vl = P.VU.vl; \
@@ -1586,25 +1586,28 @@ for (reg_t i = 0; i < P.VU.vlmax && P.VU.vl != 0; ++i) { \
   if (nf >= 2) \
     require_noover(vd, nf, insn.rs2(), 1); \
   const reg_t vlmul = P.VU.vlmul; \
+  VI_DUPLICATE_VREG(insn.rs2(), elt_width); \
   for (reg_t i = 0; i < vl; ++i) { \
     VI_ELEMENT_SKIP(i); \
     VI_STRIP(i); \
     P.VU.vstart = i; \
     for (reg_t fn = 0; fn < nf; ++fn) { \
-      ld_width##_t val = MMU.load_##ld_width( \
-        baseAddr + (stride) + (offset) * sizeof(ld_width##_t)); \
       switch(P.VU.vsew){ \
         case e8: \
-          P.VU.elt<uint8_t>(vd + fn * vlmul, vreg_inx, true) = val; \
+          P.VU.elt<uint8_t>(vd + fn * vlmul, vreg_inx, true) = \
+            MMU.load_uint8(baseAddr + index[i] + fn * 1); \
           break; \
         case e16: \
-          P.VU.elt<uint16_t>(vd + fn * vlmul, vreg_inx, true) = val; \
+          P.VU.elt<uint16_t>(vd + fn * vlmul, vreg_inx, true) = \
+            MMU.load_uint16(baseAddr + index[i] + fn * 2); \
           break; \
         case e32: \
-          P.VU.elt<uint32_t>(vd + fn * vlmul, vreg_inx, true) = val; \
+          P.VU.elt<uint32_t>(vd + fn * vlmul, vreg_inx, true) = \
+            MMU.load_uint32(baseAddr + index[i] + fn * 4); \
           break; \
         default: \
-          P.VU.elt<uint64_t>(vd + fn * vlmul, vreg_inx, true) = val; \
+          P.VU.elt<uint64_t>(vd + fn * vlmul, vreg_inx, true) = \
+            MMU.load_uint64(baseAddr + index[i] + fn * 8); \
           break; \
       } \
     } \
diff --git a/riscv/insns/vlxei16_v.h b/riscv/insns/vlxei16_v.h
index 0905b58..6e4ed49 100644
--- a/riscv/insns/vlxei16_v.h
+++ b/riscv/insns/vlxei16_v.h
@@ -1,24 +1,2 @@
 // vlxei16.v and vlxseg[2-8]e16.v
-VI_DUPLICATE_VREG(insn.rs2(), e16);
-
-switch(P.VU.vsew) {
-  case e8: {
-      VI_LD_INDEX(index[i], fn, int8, true);
-    }
-    break;
-  case e16: {
-      VI_LD_INDEX(index[i], fn, int16, true);
-    }
-    break;
-  case e32: {
-      VI_LD_INDEX(index[i], fn, int32, true);
-    }
-    break;
-  case e64: {
-      VI_LD_INDEX(index[i], fn, int64, true);
-    }
-    break;
-  default:
-    require(0);
-    break;
-};
+VI_LD_INDEX(e16, true);
diff --git a/riscv/insns/vlxei32_v.h b/riscv/insns/vlxei32_v.h
index a096cd3..a7da8ff 100644
--- a/riscv/insns/vlxei32_v.h
+++ b/riscv/insns/vlxei32_v.h
@@ -1,24 +1,2 @@
 // vlxe32.v and vlxseg[2-8]ei32.v
-VI_DUPLICATE_VREG(insn.rs2(), e32);
-
-switch(P.VU.vsew) {
-  case e8: {
-      VI_LD_INDEX(index[i], fn, int8, true);
-    }
-    break;
-  case e16: {
-      VI_LD_INDEX(index[i], fn, int16, true);
-    }
-    break;
-  case e32: {
-      VI_LD_INDEX(index[i], fn, int32, true);
-    }
-    break;
-  case e64: {
-      VI_LD_INDEX(index[i], fn, int64, true);
-    }
-    break;
-  default:
-    require(0);
-    break;
-};
+VI_LD_INDEX(e32, true);
diff --git a/riscv/insns/vlxei64_v.h b/riscv/insns/vlxei64_v.h
index 0d04405..067224e 100644
--- a/riscv/insns/vlxei64_v.h
+++ b/riscv/insns/vlxei64_v.h
@@ -1,24 +1,3 @@
 // vlxei64.v and vlxseg[2-8]ei64.v
-VI_DUPLICATE_VREG(insn.rs2(), e64);
+VI_LD_INDEX(e64, true);
 
-switch(P.VU.vsew) {
-  case e8: {
-      VI_LD_INDEX(index[i], fn, int8, true);
-    }
-    break;
-  case e16: {
-      VI_LD_INDEX(index[i], fn, int16, true);
-    }
-    break;
-  case e32: {
-      VI_LD_INDEX(index[i], fn, int32, true);
-    }
-    break;
-  case e64: {
-      VI_LD_INDEX(index[i], fn, int64, true);
-    }
-    break;
-  default:
-    require(0);
-    break;
-};
diff --git a/riscv/insns/vlxei8_v.h b/riscv/insns/vlxei8_v.h
index 2db5047..d273049 100644
--- a/riscv/insns/vlxei8_v.h
+++ b/riscv/insns/vlxei8_v.h
@@ -1,24 +1,2 @@
 // vlxei8.v and vlxseg[2-8]ei8.v
-VI_DUPLICATE_VREG(insn.rs2(), e8);
-
-switch(P.VU.vsew) {
-  case e8: {
-      VI_LD_INDEX(index[i], fn, int8, true);
-    }
-    break;
-  case e16: {
-      VI_LD_INDEX(index[i], fn, int16, true);
-    }
-    break;
-  case e32: {
-      VI_LD_INDEX(index[i], fn, int32, true);
-    }
-    break;
-  case e64: {
-      VI_LD_INDEX(index[i], fn, int64, true);
-    }
-    break;
-  default:
-    require(0);
-    break;
-};
+VI_LD_INDEX(e8, true);