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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-21 09:27:50 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-21 09:27:55 -0700 |
| commit | 264ae74af0ca320f9167662a810779c42e0153d4 (patch) | |
| tree | df7decdcde9a27d477ceece83a1e5d97ddfa1bfa /riscv | |
| parent | 7b1291e2debde18c48cf30815fe4777ef3cce4f1 (diff) | |
| download | spike-264ae74af0ca320f9167662a810779c42e0153d4.zip spike-264ae74af0ca320f9167662a810779c42e0153d4.tar.gz spike-264ae74af0ca320f9167662a810779c42e0153d4.tar.bz2 | |
rvv: fix vms[bio]f.m checking rule
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/insns/vmsbf_m.h | 7 | ||||
| -rw-r--r-- | riscv/insns/vmsif_m.h | 7 | ||||
| -rw-r--r-- | riscv/insns/vmsof_m.h | 7 |
3 files changed, 12 insertions, 9 deletions
diff --git a/riscv/insns/vmsbf_m.h b/riscv/insns/vmsbf_m.h index 356ed2b..11582e5 100644 --- a/riscv/insns/vmsbf_m.h +++ b/riscv/insns/vmsbf_m.h @@ -2,10 +2,11 @@ require(P.VU.vsew >= e8 && P.VU.vsew <= e64); require_vector; require(P.VU.vstart == 0); -reg_t vl = P.VU.vl; -reg_t sew = P.VU.vsew; +if (insn.v_vm() == 0) + require(insn.rd() != 0 && insn.rd() != insn.rs2()); + +reg_t vl = std::min(P.VU.vl, P.VU.VLEN); reg_t rd_num = insn.rd(); -reg_t rs1_num = insn.rs1(); reg_t rs2_num = insn.rs2(); bool has_one = false; diff --git a/riscv/insns/vmsif_m.h b/riscv/insns/vmsif_m.h index 366c926..e608a61 100644 --- a/riscv/insns/vmsif_m.h +++ b/riscv/insns/vmsif_m.h @@ -2,10 +2,11 @@ require(P.VU.vsew >= e8 && P.VU.vsew <= e64); require_vector; require(P.VU.vstart == 0); -reg_t vl = P.VU.vl; -reg_t sew = P.VU.vsew; +if (insn.v_vm() == 0) + require(insn.rd() != 0 && insn.rd() != insn.rs2()); + +reg_t vl = std::min(P.VU.vl, P.VU.VLEN); reg_t rd_num = insn.rd(); -reg_t rs1_num = insn.rs1(); reg_t rs2_num = insn.rs2(); bool has_one = false; diff --git a/riscv/insns/vmsof_m.h b/riscv/insns/vmsof_m.h index 2481c0b..f6c65be 100644 --- a/riscv/insns/vmsof_m.h +++ b/riscv/insns/vmsof_m.h @@ -2,10 +2,11 @@ require(P.VU.vsew >= e8 && P.VU.vsew <= e64); require_vector; require(P.VU.vstart == 0); -reg_t vl = P.VU.vl; -reg_t sew = P.VU.vsew; +if (insn.v_vm() == 0) + require(insn.rd() != 0 && insn.rd() != insn.rs2()); + +reg_t vl = std::min(P.VU.vl, P.VU.VLEN); reg_t rd_num = insn.rd(); -reg_t rs1_num = insn.rs1(); reg_t rs2_num = insn.rs2(); bool has_one = false; |