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author | Andrew Waterman <andrew@sifive.com> | 2021-01-08 17:12:32 -0800 |
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committer | Andrew Waterman <andrew@sifive.com> | 2021-01-08 17:12:32 -0800 |
commit | c9af3ebbcc05fa901087085f8990824d578eb83c (patch) | |
tree | 34eea4da5ceafd19013af60434abf9593798ca1f /riscv | |
parent | c14c1ab21ea3dbd66ba5355b0a0cbaecdaed050e (diff) | |
download | spike-c9af3ebbcc05fa901087085f8990824d578eb83c.zip spike-c9af3ebbcc05fa901087085f8990824d578eb83c.tar.gz spike-c9af3ebbcc05fa901087085f8990824d578eb83c.tar.bz2 |
Update Zba/Zbb/Zbc to v0.93; Zbs/Zbe to v0.94-draft
Diffstat (limited to 'riscv')
-rw-r--r-- | riscv/encoding.h | 730 | ||||
-rw-r--r-- | riscv/insns/add_uw.h (renamed from riscv/insns/addu_w.h) | 0 | ||||
-rw-r--r-- | riscv/insns/addiwu.h | 3 | ||||
-rw-r--r-- | riscv/insns/addwu.h | 3 | ||||
-rw-r--r-- | riscv/insns/bclr.h (renamed from riscv/insns/sbclr.h) | 0 | ||||
-rw-r--r-- | riscv/insns/bclri.h (renamed from riscv/insns/sbclri.h) | 0 | ||||
-rw-r--r-- | riscv/insns/bcompress.h | 9 | ||||
-rw-r--r-- | riscv/insns/bcompressw.h (renamed from riscv/insns/bextw.h) | 0 | ||||
-rw-r--r-- | riscv/insns/bdecompress.h (renamed from riscv/insns/bdep.h) | 0 | ||||
-rw-r--r-- | riscv/insns/bdecompressw.h (renamed from riscv/insns/bdepw.h) | 0 | ||||
-rw-r--r-- | riscv/insns/bext.h | 10 | ||||
-rw-r--r-- | riscv/insns/bexti.h (renamed from riscv/insns/sbexti.h) | 0 | ||||
-rw-r--r-- | riscv/insns/binv.h (renamed from riscv/insns/sbinv.h) | 0 | ||||
-rw-r--r-- | riscv/insns/binvi.h (renamed from riscv/insns/sbinvi.h) | 0 | ||||
-rw-r--r-- | riscv/insns/bset.h (renamed from riscv/insns/sbset.h) | 0 | ||||
-rw-r--r-- | riscv/insns/bseti.h (renamed from riscv/insns/sbseti.h) | 0 | ||||
-rw-r--r-- | riscv/insns/cpop.h (renamed from riscv/insns/pcnt.h) | 0 | ||||
-rw-r--r-- | riscv/insns/cpopw.h (renamed from riscv/insns/pcntw.h) | 0 | ||||
-rw-r--r-- | riscv/insns/sbclriw.h | 3 | ||||
-rw-r--r-- | riscv/insns/sbclrw.h | 3 | ||||
-rw-r--r-- | riscv/insns/sbext.h | 3 | ||||
-rw-r--r-- | riscv/insns/sbextw.h | 3 | ||||
-rw-r--r-- | riscv/insns/sbinviw.h | 3 | ||||
-rw-r--r-- | riscv/insns/sbinvw.h | 3 | ||||
-rw-r--r-- | riscv/insns/sbsetiw.h | 3 | ||||
-rw-r--r-- | riscv/insns/sbsetw.h | 3 | ||||
-rw-r--r-- | riscv/insns/sh1add_uw.h (renamed from riscv/insns/sh1addu_w.h) | 0 | ||||
-rw-r--r-- | riscv/insns/sh2add_uw.h (renamed from riscv/insns/sh2addu_w.h) | 0 | ||||
-rw-r--r-- | riscv/insns/sh3add_uw.h (renamed from riscv/insns/sh3addu_w.h) | 0 | ||||
-rw-r--r-- | riscv/insns/slli_uw.h (renamed from riscv/insns/slliu_w.h) | 0 | ||||
-rw-r--r-- | riscv/insns/subwu.h | 3 | ||||
-rw-r--r-- | riscv/riscv.mk.in | 51 |
32 files changed, 382 insertions, 451 deletions
diff --git a/riscv/encoding.h b/riscv/encoding.h index 042b7b2..448d6af 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -1,3 +1,8 @@ +/* + * This file is auto-generated by running 'make ../riscv-isa-sim/riscv/encoding.h' in + * https://github.com/riscv/riscv-opcodes (2aa7492) + */ + /* See LICENSE for license details. */ #ifndef RISCV_CSR_ENCODING_H @@ -455,218 +460,6 @@ #define MASK_REMW 0xfe00707f #define MATCH_REMUW 0x200703b #define MASK_REMUW 0xfe00707f -#define MATCH_ANDN 0x40007033 -#define MASK_ANDN 0xfe00707f -#define MATCH_ORN 0x40006033 -#define MASK_ORN 0xfe00707f -#define MATCH_XNOR 0x40004033 -#define MASK_XNOR 0xfe00707f -#define MATCH_SLO 0x20001033 -#define MASK_SLO 0xfe00707f -#define MATCH_SRO 0x20005033 -#define MASK_SRO 0xfe00707f -#define MATCH_ROL 0x60001033 -#define MASK_ROL 0xfe00707f -#define MATCH_ROR 0x60005033 -#define MASK_ROR 0xfe00707f -#define MATCH_SBCLR 0x48001033 -#define MASK_SBCLR 0xfe00707f -#define MATCH_SBSET 0x28001033 -#define MASK_SBSET 0xfe00707f -#define MATCH_SBINV 0x68001033 -#define MASK_SBINV 0xfe00707f -#define MATCH_SBEXT 0x48005033 -#define MASK_SBEXT 0xfe00707f -#define MATCH_GORC 0x28005033 -#define MASK_GORC 0xfe00707f -#define MATCH_GREV 0x68005033 -#define MASK_GREV 0xfe00707f -#define MATCH_SLOI 0x20001013 -#define MASK_SLOI 0xfc00707f -#define MATCH_SROI 0x20005013 -#define MASK_SROI 0xfc00707f -#define MATCH_RORI 0x60005013 -#define MASK_RORI 0xfc00707f -#define MATCH_SBCLRI 0x48001013 -#define MASK_SBCLRI 0xfc00707f -#define MATCH_SBSETI 0x28001013 -#define MASK_SBSETI 0xfc00707f -#define MATCH_SBINVI 0x68001013 -#define MASK_SBINVI 0xfc00707f -#define MATCH_SBEXTI 0x48005013 -#define MASK_SBEXTI 0xfc00707f -#define MATCH_GORCI 0x28005013 -#define MASK_GORCI 0xfc00707f -#define MATCH_GREVI 0x68005013 -#define MASK_GREVI 0xfc00707f -#define MATCH_CMIX 0x6001033 -#define MASK_CMIX 0x600707f -#define MATCH_CMOV 0x6005033 -#define MASK_CMOV 0x600707f -#define MATCH_FSL 0x4001033 -#define MASK_FSL 0x600707f -#define MATCH_FSR 0x4005033 -#define MASK_FSR 0x600707f -#define MATCH_FSRI 0x4005013 -#define MASK_FSRI 0x400707f -#define MATCH_CLZ 0x60001013 -#define MASK_CLZ 0xfff0707f -#define MATCH_CTZ 0x60101013 -#define MASK_CTZ 0xfff0707f -#define MATCH_PCNT 0x60201013 -#define MASK_PCNT 0xfff0707f -#define MATCH_SEXT_B 0x60401013 -#define MASK_SEXT_B 0xfff0707f -#define MATCH_SEXT_H 0x60501013 -#define MASK_SEXT_H 0xfff0707f -#define MATCH_CRC32_B 0x61001013 -#define MASK_CRC32_B 0xfff0707f -#define MATCH_CRC32_H 0x61101013 -#define MASK_CRC32_H 0xfff0707f -#define MATCH_CRC32_W 0x61201013 -#define MASK_CRC32_W 0xfff0707f -#define MATCH_CRC32C_B 0x61801013 -#define MASK_CRC32C_B 0xfff0707f -#define MATCH_CRC32C_H 0x61901013 -#define MASK_CRC32C_H 0xfff0707f -#define MATCH_CRC32C_W 0x61a01013 -#define MASK_CRC32C_W 0xfff0707f -#define MATCH_SH1ADD 0x20002033 -#define MASK_SH1ADD 0xfe00707f -#define MATCH_SH2ADD 0x20004033 -#define MASK_SH2ADD 0xfe00707f -#define MATCH_SH3ADD 0x20006033 -#define MASK_SH3ADD 0xfe00707f -#define MATCH_CLMUL 0xa001033 -#define MASK_CLMUL 0xfe00707f -#define MATCH_CLMULR 0xa002033 -#define MASK_CLMULR 0xfe00707f -#define MATCH_CLMULH 0xa003033 -#define MASK_CLMULH 0xfe00707f -#define MATCH_MIN 0xa004033 -#define MASK_MIN 0xfe00707f -#define MATCH_MINU 0xa005033 -#define MASK_MINU 0xfe00707f -#define MATCH_MAX 0xa006033 -#define MASK_MAX 0xfe00707f -#define MATCH_MAXU 0xa007033 -#define MASK_MAXU 0xfe00707f -#define MATCH_SHFL 0x8001033 -#define MASK_SHFL 0xfe00707f -#define MATCH_UNSHFL 0x8005033 -#define MASK_UNSHFL 0xfe00707f -#define MATCH_BEXT 0x8006033 -#define MASK_BEXT 0xfe00707f -#define MATCH_BDEP 0x48006033 -#define MASK_BDEP 0xfe00707f -#define MATCH_PACK 0x8004033 -#define MASK_PACK 0xfe00707f -#define MATCH_PACKU 0x48004033 -#define MASK_PACKU 0xfe00707f -#define MATCH_PACKH 0x8007033 -#define MASK_PACKH 0xfe00707f -#define MATCH_BFP 0x48007033 -#define MASK_BFP 0xfe00707f -#define MATCH_SHFLI 0x8001013 -#define MASK_SHFLI 0xfe00707f -#define MATCH_UNSHFLI 0x8005013 -#define MASK_UNSHFLI 0xfe00707f -#define MATCH_BMATFLIP 0x60301013 -#define MASK_BMATFLIP 0xfff0707f -#define MATCH_CRC32_D 0x61301013 -#define MASK_CRC32_D 0xfff0707f -#define MATCH_CRC32C_D 0x61b01013 -#define MASK_CRC32C_D 0xfff0707f -#define MATCH_BMATOR 0x8003033 -#define MASK_BMATOR 0xfe00707f -#define MATCH_BMATXOR 0x48003033 -#define MASK_BMATXOR 0xfe00707f -#define MATCH_ADDIWU 0x401b -#define MASK_ADDIWU 0x707f -#define MATCH_SLLIU_W 0x800101b -#define MASK_SLLIU_W 0xfc00707f -#define MATCH_ADDWU 0xa00003b -#define MASK_ADDWU 0xfe00707f -#define MATCH_SUBWU 0x4a00003b -#define MASK_SUBWU 0xfe00707f -#define MATCH_ADDU_W 0x800003b -#define MASK_ADDU_W 0xfe00707f -#define MATCH_SUBU_W 0x4800003b -#define MASK_SUBU_W 0xfe00707f -#define MATCH_SLOW 0x2000103b -#define MASK_SLOW 0xfe00707f -#define MATCH_SROW 0x2000503b -#define MASK_SROW 0xfe00707f -#define MATCH_ROLW 0x6000103b -#define MASK_ROLW 0xfe00707f -#define MATCH_RORW 0x6000503b -#define MASK_RORW 0xfe00707f -#define MATCH_SBCLRW 0x4800103b -#define MASK_SBCLRW 0xfe00707f -#define MATCH_SBSETW 0x2800103b -#define MASK_SBSETW 0xfe00707f -#define MATCH_SBINVW 0x6800103b -#define MASK_SBINVW 0xfe00707f -#define MATCH_SBEXTW 0x4800503b -#define MASK_SBEXTW 0xfe00707f -#define MATCH_GORCW 0x2800503b -#define MASK_GORCW 0xfe00707f -#define MATCH_GREVW 0x6800503b -#define MASK_GREVW 0xfe00707f -#define MATCH_SLOIW 0x2000101b -#define MASK_SLOIW 0xfe00707f -#define MATCH_SROIW 0x2000501b -#define MASK_SROIW 0xfe00707f -#define MATCH_RORIW 0x6000501b -#define MASK_RORIW 0xfe00707f -#define MATCH_SBCLRIW 0x4800101b -#define MASK_SBCLRIW 0xfe00707f -#define MATCH_SBSETIW 0x2800101b -#define MASK_SBSETIW 0xfe00707f -#define MATCH_SBINVIW 0x6800101b -#define MASK_SBINVIW 0xfe00707f -#define MATCH_GORCIW 0x2800501b -#define MASK_GORCIW 0xfe00707f -#define MATCH_GREVIW 0x6800501b -#define MASK_GREVIW 0xfe00707f -#define MATCH_FSLW 0x400103b -#define MASK_FSLW 0x600707f -#define MATCH_FSRW 0x400503b -#define MASK_FSRW 0x600707f -#define MATCH_FSRIW 0x400501b -#define MASK_FSRIW 0x600707f -#define MATCH_CLZW 0x6000101b -#define MASK_CLZW 0xfff0707f -#define MATCH_CTZW 0x6010101b -#define MASK_CTZW 0xfff0707f -#define MATCH_PCNTW 0x6020101b -#define MASK_PCNTW 0xfff0707f -#define MATCH_SH1ADDU_W 0x2000203b -#define MASK_SH1ADDU_W 0xfe00707f -#define MATCH_SH2ADDU_W 0x2000403b -#define MASK_SH2ADDU_W 0xfe00707f -#define MATCH_SH3ADDU_W 0x2000603b -#define MASK_SH3ADDU_W 0xfe00707f -#define MATCH_CLMULW 0xa00103b -#define MASK_CLMULW 0xfe00707f -#define MATCH_CLMULRW 0xa00203b -#define MASK_CLMULRW 0xfe00707f -#define MATCH_CLMULHW 0xa00303b -#define MASK_CLMULHW 0xfe00707f -#define MATCH_SHFLW 0x800103b -#define MASK_SHFLW 0xfe00707f -#define MATCH_UNSHFLW 0x800503b -#define MASK_UNSHFLW 0xfe00707f -#define MATCH_BEXTW 0x800603b -#define MASK_BEXTW 0xfe00707f -#define MATCH_BDEPW 0x4800603b -#define MASK_BDEPW 0xfe00707f -#define MATCH_PACKW 0x800403b -#define MASK_PACKW 0xfe00707f -#define MATCH_PACKUW 0x4800403b -#define MASK_PACKUW 0xfe00707f -#define MATCH_BFPW 0x4800703b -#define MASK_BFPW 0xfe00707f #define MATCH_AMOADD_W 0x202f #define MASK_AMOADD_W 0xf800707f #define MATCH_AMOXOR_W 0x2000202f @@ -929,10 +722,232 @@ #define MASK_FCVT_Q_L 0xfff0007f #define MATCH_FCVT_Q_LU 0xd6300053 #define MASK_FCVT_Q_LU 0xfff0007f -#define MATCH_FMV_X_Q 0xe6000053 -#define MASK_FMV_X_Q 0xfff0707f -#define MATCH_FMV_Q_X 0xf6000053 -#define MASK_FMV_Q_X 0xfff0707f +#define MATCH_ANDN 0x40007033 +#define MASK_ANDN 0xfe00707f +#define MATCH_ORN 0x40006033 +#define MASK_ORN 0xfe00707f +#define MATCH_XNOR 0x40004033 +#define MASK_XNOR 0xfe00707f +#define MATCH_SLO 0x20001033 +#define MASK_SLO 0xfe00707f +#define MATCH_SRO 0x20005033 +#define MASK_SRO 0xfe00707f +#define MATCH_ROL 0x60001033 +#define MASK_ROL 0xfe00707f +#define MATCH_ROR 0x60005033 +#define MASK_ROR 0xfe00707f +#define MATCH_BCLR 0x48001033 +#define MASK_BCLR 0xfe00707f +#define MATCH_BSET 0x28001033 +#define MASK_BSET 0xfe00707f +#define MATCH_BINV 0x68001033 +#define MASK_BINV 0xfe00707f +#define MATCH_BEXT 0x48005033 +#define MASK_BEXT 0xfe00707f +#define MATCH_GORC 0x28005033 +#define MASK_GORC 0xfe00707f +#define MATCH_GREV 0x68005033 +#define MASK_GREV 0xfe00707f +#define MATCH_SLOI 0x20001013 +#define MASK_SLOI 0xfc00707f +#define MATCH_SROI 0x20005013 +#define MASK_SROI 0xfc00707f +#define MATCH_RORI 0x60005013 +#define MASK_RORI 0xfc00707f +#define MATCH_BCLRI 0x48001013 +#define MASK_BCLRI 0xfc00707f +#define MATCH_BSETI 0x28001013 +#define MASK_BSETI 0xfc00707f +#define MATCH_BINVI 0x68001013 +#define MASK_BINVI 0xfc00707f +#define MATCH_BEXTI 0x48005013 +#define MASK_BEXTI 0xfc00707f +#define MATCH_GORCI 0x28005013 +#define MASK_GORCI 0xfc00707f +#define MATCH_GREVI 0x68005013 +#define MASK_GREVI 0xfc00707f +#define MATCH_CMIX 0x6001033 +#define MASK_CMIX 0x600707f +#define MATCH_CMOV 0x6005033 +#define MASK_CMOV 0x600707f +#define MATCH_FSL 0x4001033 +#define MASK_FSL 0x600707f +#define MATCH_FSR 0x4005033 +#define MASK_FSR 0x600707f +#define MATCH_FSRI 0x4005013 +#define MASK_FSRI 0x400707f +#define MATCH_CLZ 0x60001013 +#define MASK_CLZ 0xfff0707f +#define MATCH_CTZ 0x60101013 +#define MASK_CTZ 0xfff0707f +#define MATCH_CPOP 0x60201013 +#define MASK_CPOP 0xfff0707f +#define MATCH_SEXT_B 0x60401013 +#define MASK_SEXT_B 0xfff0707f +#define MATCH_SEXT_H 0x60501013 +#define MASK_SEXT_H 0xfff0707f +#define MATCH_CRC32_B 0x61001013 +#define MASK_CRC32_B 0xfff0707f +#define MATCH_CRC32_H 0x61101013 +#define MASK_CRC32_H 0xfff0707f +#define MATCH_CRC32_W 0x61201013 +#define MASK_CRC32_W 0xfff0707f +#define MATCH_CRC32C_B 0x61801013 +#define MASK_CRC32C_B 0xfff0707f +#define MATCH_CRC32C_H 0x61901013 +#define MASK_CRC32C_H 0xfff0707f +#define MATCH_CRC32C_W 0x61a01013 +#define MASK_CRC32C_W 0xfff0707f +#define MATCH_SH1ADD 0x20002033 +#define MASK_SH1ADD 0xfe00707f +#define MATCH_SH2ADD 0x20004033 +#define MASK_SH2ADD 0xfe00707f +#define MATCH_SH3ADD 0x20006033 +#define MASK_SH3ADD 0xfe00707f +#define MATCH_CLMUL 0xa001033 +#define MASK_CLMUL 0xfe00707f +#define MATCH_CLMULR 0xa002033 +#define MASK_CLMULR 0xfe00707f +#define MATCH_CLMULH 0xa003033 +#define MASK_CLMULH 0xfe00707f +#define MATCH_MIN 0xa004033 +#define MASK_MIN 0xfe00707f +#define MATCH_MINU 0xa005033 +#define MASK_MINU 0xfe00707f +#define MATCH_MAX 0xa006033 +#define MASK_MAX 0xfe00707f +#define MATCH_MAXU 0xa007033 +#define MASK_MAXU 0xfe00707f +#define MATCH_SHFL 0x8001033 +#define MASK_SHFL 0xfe00707f +#define MATCH_UNSHFL 0x8005033 +#define MASK_UNSHFL 0xfe00707f +#define MATCH_BCOMPRESS 0x8006033 +#define MASK_BCOMPRESS 0xfe00707f +#define MATCH_BDECOMPRESS 0x48006033 +#define MASK_BDECOMPRESS 0xfe00707f +#define MATCH_PACK 0x8004033 +#define MASK_PACK 0xfe00707f +#define MATCH_PACKU 0x48004033 +#define MASK_PACKU 0xfe00707f +#define MATCH_PACKH 0x8007033 +#define MASK_PACKH 0xfe00707f +#define MATCH_BFP 0x48007033 +#define MASK_BFP 0xfe00707f +#define MATCH_SHFLI 0x8001013 +#define MASK_SHFLI 0xfe00707f +#define MATCH_UNSHFLI 0x8005013 +#define MASK_UNSHFLI 0xfe00707f +#define MATCH_BMATFLIP 0x60301013 +#define MASK_BMATFLIP 0xfff0707f +#define MATCH_CRC32_D 0x61301013 +#define MASK_CRC32_D 0xfff0707f +#define MATCH_CRC32C_D 0x61b01013 +#define MASK_CRC32C_D 0xfff0707f +#define MATCH_BMATOR 0x8003033 +#define MASK_BMATOR 0xfe00707f +#define MATCH_BMATXOR 0x48003033 +#define MASK_BMATXOR 0xfe00707f +#define MATCH_SLLI_UW 0x800101b +#define MASK_SLLI_UW 0xfc00707f +#define MATCH_ADD_UW 0x800003b +#define MASK_ADD_UW 0xfe00707f +#define MATCH_SLOW 0x2000103b +#define MASK_SLOW 0xfe00707f +#define MATCH_SROW 0x2000503b +#define MASK_SROW 0xfe00707f +#define MATCH_ROLW 0x6000103b +#define MASK_ROLW 0xfe00707f +#define MATCH_RORW 0x6000503b +#define MASK_RORW 0xfe00707f +#define MATCH_SBCLRW 0x4800103b +#define MASK_SBCLRW 0xfe00707f +#define MATCH_SBSETW 0x2800103b +#define MASK_SBSETW 0xfe00707f +#define MATCH_SBINVW 0x6800103b +#define MASK_SBINVW 0xfe00707f +#define MATCH_SBEXTW 0x4800503b +#define MASK_SBEXTW 0xfe00707f +#define MATCH_GORCW 0x2800503b +#define MASK_GORCW 0xfe00707f +#define MATCH_GREVW 0x6800503b +#define MASK_GREVW 0xfe00707f +#define MATCH_SLOIW 0x2000101b +#define MASK_SLOIW 0xfe00707f +#define MATCH_SROIW 0x2000501b +#define MASK_SROIW 0xfe00707f +#define MATCH_RORIW 0x6000501b +#define MASK_RORIW 0xfe00707f +#define MATCH_SBCLRIW 0x4800101b +#define MASK_SBCLRIW 0xfe00707f +#define MATCH_SBSETIW 0x2800101b +#define MASK_SBSETIW 0xfe00707f +#define MATCH_SBINVIW 0x6800101b +#define MASK_SBINVIW 0xfe00707f +#define MATCH_GORCIW 0x2800501b +#define MASK_GORCIW 0xfe00707f +#define MATCH_GREVIW 0x6800501b +#define MASK_GREVIW 0xfe00707f +#define MATCH_FSLW 0x400103b +#define MASK_FSLW 0x600707f +#define MATCH_FSRW 0x400503b +#define MASK_FSRW 0x600707f +#define MATCH_FSRIW 0x400501b +#define MASK_FSRIW 0x600707f +#define MATCH_CLZW 0x6000101b +#define MASK_CLZW 0xfff0707f +#define MATCH_CTZW 0x6010101b +#define MASK_CTZW 0xfff0707f +#define MATCH_CPOPW 0x6020101b +#define MASK_CPOPW 0xfff0707f +#define MATCH_SH1ADD_UW 0x2000203b +#define MASK_SH1ADD_UW 0xfe00707f +#define MATCH_SH2ADD_UW 0x2000403b +#define MASK_SH2ADD_UW 0xfe00707f +#define MATCH_SH3ADD_UW 0x2000603b +#define MASK_SH3ADD_UW 0xfe00707f +#define MATCH_SHFLW 0x800103b +#define MASK_SHFLW 0xfe00707f +#define MATCH_UNSHFLW 0x800503b +#define MASK_UNSHFLW 0xfe00707f +#define MATCH_BCOMPRESSW 0x800603b +#define MASK_BCOMPRESSW 0xfe00707f +#define MATCH_BDECOMPRESSW 0x4800603b +#define MASK_BDECOMPRESSW 0xfe00707f +#define MATCH_PACKW 0x800403b +#define MASK_PACKW 0xfe00707f +#define MATCH_PACKUW 0x4800403b +#define MASK_PACKUW 0xfe00707f +#define MATCH_BFPW 0x4800703b +#define MASK_BFPW 0xfe00707f +#define MATCH_ECALL 0x73 +#define MASK_ECALL 0xffffffff +#define MATCH_EBREAK 0x100073 +#define MASK_EBREAK 0xffffffff +#define MATCH_URET 0x200073 +#define MASK_URET 0xffffffff +#define MATCH_SRET 0x10200073 +#define MASK_SRET 0xffffffff +#define MATCH_MRET 0x30200073 +#define MASK_MRET 0xffffffff +#define MATCH_DRET 0x7b200073 +#define MASK_DRET 0xffffffff +#define MATCH_SFENCE_VMA 0x12000073 +#define MASK_SFENCE_VMA 0xfe007fff +#define MATCH_WFI 0x10500073 +#define MASK_WFI 0xffffffff +#define MATCH_CSRRW 0x1073 +#define MASK_CSRRW 0x707f +#define MATCH_CSRRS 0x2073 +#define MASK_CSRRS 0x707f +#define MATCH_CSRRC 0x3073 +#define MASK_CSRRC 0x707f +#define MATCH_CSRRWI 0x5073 +#define MASK_CSRRWI 0x707f +#define MATCH_CSRRSI 0x6073 +#define MASK_CSRRSI 0x707f +#define MATCH_CSRRCI 0x7073 +#define MASK_CSRRCI 0x707f #define MATCH_FADD_H 0x4000053 #define MASK_FADD_H 0xfe00007f #define MATCH_FSUB_H 0xc000053 @@ -1005,34 +1020,6 @@ #define MASK_FCVT_H_L 0xfff0007f #define MATCH_FCVT_H_LU 0xd4300053 #define MASK_FCVT_H_LU 0xfff0007f -#define MATCH_ECALL 0x73 -#define MASK_ECALL 0xffffffff -#define MATCH_EBREAK 0x100073 -#define MASK_EBREAK 0xffffffff -#define MATCH_URET 0x200073 -#define MASK_URET 0xffffffff -#define MATCH_SRET 0x10200073 -#define MASK_SRET 0xffffffff -#define MATCH_MRET 0x30200073 -#define MASK_MRET 0xffffffff -#define MATCH_DRET 0x7b200073 -#define MASK_DRET 0xffffffff -#define MATCH_SFENCE_VMA 0x12000073 -#define MASK_SFENCE_VMA 0xfe007fff -#define MATCH_WFI 0x10500073 -#define MASK_WFI 0xffffffff -#define MATCH_CSRRW 0x1073 -#define MASK_CSRRW 0x707f -#define MATCH_CSRRS 0x2073 -#define MASK_CSRRS 0x707f -#define MATCH_CSRRC 0x3073 -#define MASK_CSRRC 0x707f -#define MATCH_CSRRWI 0x5073 -#define MASK_CSRRWI 0x707f -#define MATCH_CSRRSI 0x6073 -#define MASK_CSRRSI 0x707f -#define MATCH_CSRRCI 0x7073 -#define MASK_CSRRCI 0x707f #define MATCH_C_NOP 0x1 #define MASK_C_NOP 0xffff #define MATCH_C_ADDI16SP 0x6101 @@ -1123,14 +1110,6 @@ #define MASK_C_LDSP 0xe003 #define MATCH_C_SDSP 0xe002 #define MASK_C_SDSP 0xe003 -#define MATCH_C_LQ 0x2000 -#define MASK_C_LQ 0xe003 -#define MATCH_C_SQ 0xa000 -#define MASK_C_SQ 0xe003 -#define MATCH_C_LQSP 0x2002 -#define MASK_C_LQSP 0xe003 -#define MATCH_C_SQSP 0xa002 -#define MASK_C_SQSP 0xe003 #define MATCH_CUSTOM0 0xb #define MASK_CUSTOM0 0x707f #define MATCH_CUSTOM0_RS1 0x200b @@ -2217,6 +2196,10 @@ #define CSR_TDATA1 0x7a1 #define CSR_TDATA2 0x7a2 #define CSR_TDATA3 0x7a3 +#define CSR_TINFO 0x7a4 +#define CSR_TCONTROL 0x7a5 +#define CSR_MCONTEXT 0x7a8 +#define CSR_SCONTEXT 0x7aa #define CSR_DCSR 0x7b0 #define CSR_DPC 0x7b1 #define CSR_DSCRATCH0 0x7b2 @@ -2458,112 +2441,6 @@ DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW) DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW) DECLARE_INSN(remw, MATCH_REMW, MASK_REMW) DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW) -DECLARE_INSN(andn, MATCH_ANDN, MASK_ANDN) -DECLARE_INSN(orn, MATCH_ORN, MASK_ORN) -DECLARE_INSN(xnor, MATCH_XNOR, MASK_XNOR) -DECLARE_INSN(slo, MATCH_SLO, MASK_SLO) -DECLARE_INSN(sro, MATCH_SRO, MASK_SRO) -DECLARE_INSN(rol, MATCH_ROL, MASK_ROL) -DECLARE_INSN(ror, MATCH_ROR, MASK_ROR) -DECLARE_INSN(sbclr, MATCH_SBCLR, MASK_SBCLR) -DECLARE_INSN(sbset, MATCH_SBSET, MASK_SBSET) -DECLARE_INSN(sbinv, MATCH_SBINV, MASK_SBINV) -DECLARE_INSN(sbext, MATCH_SBEXT, MASK_SBEXT) -DECLARE_INSN(gorc, MATCH_GORC, MASK_GORC) -DECLARE_INSN(grev, MATCH_GREV, MASK_GREV) -DECLARE_INSN(sloi, MATCH_SLOI, MASK_SLOI) -DECLARE_INSN(sroi, MATCH_SROI, MASK_SROI) -DECLARE_INSN(rori, MATCH_RORI, MASK_RORI) -DECLARE_INSN(sbclri, MATCH_SBCLRI, MASK_SBCLRI) -DECLARE_INSN(sbseti, MATCH_SBSETI, MASK_SBSETI) -DECLARE_INSN(sbinvi, MATCH_SBINVI, MASK_SBINVI) -DECLARE_INSN(sbexti, MATCH_SBEXTI, MASK_SBEXTI) -DECLARE_INSN(gorci, MATCH_GORCI, MASK_GORCI) -DECLARE_INSN(grevi, MATCH_GREVI, MASK_GREVI) -DECLARE_INSN(cmix, MATCH_CMIX, MASK_CMIX) -DECLARE_INSN(cmov, MATCH_CMOV, MASK_CMOV) -DECLARE_INSN(fsl, MATCH_FSL, MASK_FSL) -DECLARE_INSN(fsr, MATCH_FSR, MASK_FSR) -DECLARE_INSN(fsri, MATCH_FSRI, MASK_FSRI) -DECLARE_INSN(clz, MATCH_CLZ, MASK_CLZ) -DECLARE_INSN(ctz, MATCH_CTZ, MASK_CTZ) -DECLARE_INSN(pcnt, MATCH_PCNT, MASK_PCNT) -DECLARE_INSN(sext_b, MATCH_SEXT_B, MASK_SEXT_B) -DECLARE_INSN(sext_h, MATCH_SEXT_H, MASK_SEXT_H) -DECLARE_INSN(crc32_b, MATCH_CRC32_B, MASK_CRC32_B) -DECLARE_INSN(crc32_h, MATCH_CRC32_H, MASK_CRC32_H) -DECLARE_INSN(crc32_w, MATCH_CRC32_W, MASK_CRC32_W) -DECLARE_INSN(crc32c_b, MATCH_CRC32C_B, MASK_CRC32C_B) -DECLARE_INSN(crc32c_h, MATCH_CRC32C_H, MASK_CRC32C_H) -DECLARE_INSN(crc32c_w, MATCH_CRC32C_W, MASK_CRC32C_W) -DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD) -DECLARE_INSN(sh2add, MATCH_SH2ADD, MASK_SH2ADD) -DECLARE_INSN(sh3add, MATCH_SH3ADD, MASK_SH3ADD) -DECLARE_INSN(clmul, MATCH_CLMUL, MASK_CLMUL) -DECLARE_INSN(clmulr, MATCH_CLMULR, MASK_CLMULR) -DECLARE_INSN(clmulh, MATCH_CLMULH, MASK_CLMULH) -DECLARE_INSN(min, MATCH_MIN, MASK_MIN) -DECLARE_INSN(max, MATCH_MAX, MASK_MAX) -DECLARE_INSN(minu, MATCH_MINU, MASK_MINU) -DECLARE_INSN(maxu, MATCH_MAXU, MASK_MAXU) -DECLARE_INSN(shfl, MATCH_SHFL, MASK_SHFL) -DECLARE_INSN(unshfl, MATCH_UNSHFL, MASK_UNSHFL) -DECLARE_INSN(bext, MATCH_BEXT, MASK_BEXT) -DECLARE_INSN(bdep, MATCH_BDEP, MASK_BDEP) -DECLARE_INSN(pack, MATCH_PACK, MASK_PACK) -DECLARE_INSN(packu, MATCH_PACKU, MASK_PACKU) -DECLARE_INSN(packh, MATCH_PACKH, MASK_PACKH) -DECLARE_INSN(bfp, MATCH_BFP, MASK_BFP) -DECLARE_INSN(shfli, MATCH_SHFLI, MASK_SHFLI) -DECLARE_INSN(unshfli, MATCH_UNSHFLI, MASK_UNSHFLI) -DECLARE_INSN(bmatflip, MATCH_BMATFLIP, MASK_BMATFLIP) -DECLARE_INSN(crc32_d, MATCH_CRC32_D, MASK_CRC32_D) -DECLARE_INSN(crc32c_d, MATCH_CRC32C_D, MASK_CRC32C_D) -DECLARE_INSN(bmator, MATCH_BMATOR, MASK_BMATOR) -DECLARE_INSN(bmatxor, MATCH_BMATXOR, MASK_BMATXOR) -DECLARE_INSN(addiwu, MATCH_ADDIWU, MASK_ADDIWU) -DECLARE_INSN(slliu_w, MATCH_SLLIU_W, MASK_SLLIU_W) -DECLARE_INSN(addwu, MATCH_ADDWU, MASK_ADDWU) -DECLARE_INSN(subwu, MATCH_SUBWU, MASK_SUBWU) -DECLARE_INSN(addu_w, MATCH_ADDU_W, MASK_ADDU_W) -DECLARE_INSN(subu_w, MATCH_SUBU_W, MASK_SUBU_W) -DECLARE_INSN(slow, MATCH_SLOW, MASK_SLOW) -DECLARE_INSN(srow, MATCH_SROW, MASK_SROW) -DECLARE_INSN(rolw, MATCH_ROLW, MASK_ROLW) -DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW) -DECLARE_INSN(sbclrw, MATCH_SBCLRW, MASK_SBCLRW) -DECLARE_INSN(sbsetw, MATCH_SBSETW, MASK_SBSETW) -DECLARE_INSN(sbinvw, MATCH_SBINVW, MASK_SBINVW) -DECLARE_INSN(sbextw, MATCH_SBEXTW, MASK_SBEXTW) -DECLARE_INSN(gorcw, MATCH_GORCW, MASK_GORCW) -DECLARE_INSN(grevw, MATCH_GREVW, MASK_GREVW) -DECLARE_INSN(sloiw, MATCH_SLOIW, MASK_SLOIW) -DECLARE_INSN(sroiw, MATCH_SROIW, MASK_SROIW) -DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW) -DECLARE_INSN(sbclriw, MATCH_SBCLRIW, MASK_SBCLRIW) -DECLARE_INSN(sbsetiw, MATCH_SBSETIW, MASK_SBSETIW) -DECLARE_INSN(sbinviw, MATCH_SBINVIW, MASK_SBINVIW) -DECLARE_INSN(gorciw, MATCH_GORCIW, MASK_GORCIW) -DECLARE_INSN(greviw, MATCH_GREVIW, MASK_GREVIW) -DECLARE_INSN(fslw, MATCH_FSLW, MASK_FSLW) -DECLARE_INSN(fsrw, MATCH_FSRW, MASK_FSRW) -DECLARE_INSN(fsriw, MATCH_FSRIW, MASK_FSRIW) -DECLARE_INSN(clzw, MATCH_CLZW, MASK_CLZW) -DECLARE_INSN(ctzw, MATCH_CTZW, MASK_CTZW) -DECLARE_INSN(pcntw, MATCH_PCNTW, MASK_PCNTW) -DECLARE_INSN(sh1addu_w, MATCH_SH1ADDU_W, MASK_SH1ADDU_W) -DECLARE_INSN(sh2addu_w, MATCH_SH2ADDU_W, MASK_SH2ADDU_W) -DECLARE_INSN(sh3addu_w, MATCH_SH3ADDU_W, MASK_SH3ADDU_W) -DECLARE_INSN(clmulw, MATCH_CLMULW, MASK_CLMULW) -DECLARE_INSN(clmulrw, MATCH_CLMULRW, MASK_CLMULRW) -DECLARE_INSN(clmulhw, MATCH_CLMULHW, MASK_CLMULHW) -DECLARE_INSN(shflw, MATCH_SHFLW, MASK_SHFLW) -DECLARE_INSN(unshflw, MATCH_UNSHFLW, MASK_UNSHFLW) -DECLARE_INSN(bextw, MATCH_BEXTW, MASK_BEXTW) -DECLARE_INSN(bdepw, MATCH_BDEPW, MASK_BDEPW) -DECLARE_INSN(packw, MATCH_PACKW, MASK_PACKW) -DECLARE_INSN(packuw, MATCH_PACKUW, MASK_PACKUW) -DECLARE_INSN(bfpw, MATCH_BFPW, MASK_BFPW) DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W) DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W) DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W) @@ -2695,8 +2572,119 @@ DECLARE_INSN(fcvt_l_q, MATCH_FCVT_L_Q, MASK_FCVT_L_Q) DECLARE_INSN(fcvt_lu_q, MATCH_FCVT_LU_Q, MASK_FCVT_LU_Q) DECLARE_INSN(fcvt_q_l, MATCH_FCVT_Q_L, MASK_FCVT_Q_L) DECLARE_INSN(fcvt_q_lu, MATCH_FCVT_Q_LU, MASK_FCVT_Q_LU) -DECLARE_INSN(fmv_x_q, MATCH_FMV_X_Q, MASK_FMV_X_Q) -DECLARE_INSN(fmv_q_x, MATCH_FMV_Q_X, MASK_FMV_Q_X) +DECLARE_INSN(andn, MATCH_ANDN, MASK_ANDN) +DECLARE_INSN(orn, MATCH_ORN, MASK_ORN) +DECLARE_INSN(xnor, MATCH_XNOR, MASK_XNOR) +DECLARE_INSN(slo, MATCH_SLO, MASK_SLO) +DECLARE_INSN(sro, MATCH_SRO, MASK_SRO) +DECLARE_INSN(rol, MATCH_ROL, MASK_ROL) +DECLARE_INSN(ror, MATCH_ROR, MASK_ROR) +DECLARE_INSN(bclr, MATCH_BCLR, MASK_BCLR) +DECLARE_INSN(bset, MATCH_BSET, MASK_BSET) +DECLARE_INSN(binv, MATCH_BINV, MASK_BINV) +DECLARE_INSN(bext, MATCH_BEXT, MASK_BEXT) +DECLARE_INSN(gorc, MATCH_GORC, MASK_GORC) +DECLARE_INSN(grev, MATCH_GREV, MASK_GREV) +DECLARE_INSN(sloi, MATCH_SLOI, MASK_SLOI) +DECLARE_INSN(sroi, MATCH_SROI, MASK_SROI) +DECLARE_INSN(rori, MATCH_RORI, MASK_RORI) +DECLARE_INSN(bclri, MATCH_BCLRI, MASK_BCLRI) +DECLARE_INSN(bseti, MATCH_BSETI, MASK_BSETI) +DECLARE_INSN(binvi, MATCH_BINVI, MASK_BINVI) +DECLARE_INSN(bexti, MATCH_BEXTI, MASK_BEXTI) +DECLARE_INSN(gorci, MATCH_GORCI, MASK_GORCI) +DECLARE_INSN(grevi, MATCH_GREVI, MASK_GREVI) +DECLARE_INSN(cmix, MATCH_CMIX, MASK_CMIX) +DECLARE_INSN(cmov, MATCH_CMOV, MASK_CMOV) +DECLARE_INSN(fsl, MATCH_FSL, MASK_FSL) +DECLARE_INSN(fsr, MATCH_FSR, MASK_FSR) +DECLARE_INSN(fsri, MATCH_FSRI, MASK_FSRI) +DECLARE_INSN(clz, MATCH_CLZ, MASK_CLZ) +DECLARE_INSN(ctz, MATCH_CTZ, MASK_CTZ) +DECLARE_INSN(cpop, MATCH_CPOP, MASK_CPOP) +DECLARE_INSN(sext_b, MATCH_SEXT_B, MASK_SEXT_B) +DECLARE_INSN(sext_h, MATCH_SEXT_H, MASK_SEXT_H) +DECLARE_INSN(crc32_b, MATCH_CRC32_B, MASK_CRC32_B) +DECLARE_INSN(crc32_h, MATCH_CRC32_H, MASK_CRC32_H) +DECLARE_INSN(crc32_w, MATCH_CRC32_W, MASK_CRC32_W) +DECLARE_INSN(crc32c_b, MATCH_CRC32C_B, MASK_CRC32C_B) +DECLARE_INSN(crc32c_h, MATCH_CRC32C_H, MASK_CRC32C_H) +DECLARE_INSN(crc32c_w, MATCH_CRC32C_W, MASK_CRC32C_W) +DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD) +DECLARE_INSN(sh2add, MATCH_SH2ADD, MASK_SH2ADD) +DECLARE_INSN(sh3add, MATCH_SH3ADD, MASK_SH3ADD) +DECLARE_INSN(clmul, MATCH_CLMUL, MASK_CLMUL) +DECLARE_INSN(clmulr, MATCH_CLMULR, MASK_CLMULR) +DECLARE_INSN(clmulh, MATCH_CLMULH, MASK_CLMULH) +DECLARE_INSN(min, MATCH_MIN, MASK_MIN) +DECLARE_INSN(minu, MATCH_MINU, MASK_MINU) +DECLARE_INSN(max, MATCH_MAX, MASK_MAX) +DECLARE_INSN(maxu, MATCH_MAXU, MASK_MAXU) +DECLARE_INSN(shfl, MATCH_SHFL, MASK_SHFL) +DECLARE_INSN(unshfl, MATCH_UNSHFL, MASK_UNSHFL) +DECLARE_INSN(bcompress, MATCH_BCOMPRESS, MASK_BCOMPRESS) +DECLARE_INSN(bdecompress, MATCH_BDECOMPRESS, MASK_BDECOMPRESS) +DECLARE_INSN(pack, MATCH_PACK, MASK_PACK) +DECLARE_INSN(packu, MATCH_PACKU, MASK_PACKU) +DECLARE_INSN(packh, MATCH_PACKH, MASK_PACKH) +DECLARE_INSN(bfp, MATCH_BFP, MASK_BFP) +DECLARE_INSN(shfli, MATCH_SHFLI, MASK_SHFLI) +DECLARE_INSN(unshfli, MATCH_UNSHFLI, MASK_UNSHFLI) +DECLARE_INSN(bmatflip, MATCH_BMATFLIP, MASK_BMATFLIP) +DECLARE_INSN(crc32_d, MATCH_CRC32_D, MASK_CRC32_D) +DECLARE_INSN(crc32c_d, MATCH_CRC32C_D, MASK_CRC32C_D) +DECLARE_INSN(bmator, MATCH_BMATOR, MASK_BMATOR) +DECLARE_INSN(bmatxor, MATCH_BMATXOR, MASK_BMATXOR) +DECLARE_INSN(slli_uw, MATCH_SLLI_UW, MASK_SLLI_UW) +DECLARE_INSN(add_uw, MATCH_ADD_UW, MASK_ADD_UW) +DECLARE_INSN(slow, MATCH_SLOW, MASK_SLOW) +DECLARE_INSN(srow, MATCH_SROW, MASK_SROW) +DECLARE_INSN(rolw, MATCH_ROLW, MASK_ROLW) +DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW) +DECLARE_INSN(sbclrw, MATCH_SBCLRW, MASK_SBCLRW) +DECLARE_INSN(sbsetw, MATCH_SBSETW, MASK_SBSETW) +DECLARE_INSN(sbinvw, MATCH_SBINVW, MASK_SBINVW) +DECLARE_INSN(sbextw, MATCH_SBEXTW, MASK_SBEXTW) +DECLARE_INSN(gorcw, MATCH_GORCW, MASK_GORCW) +DECLARE_INSN(grevw, MATCH_GREVW, MASK_GREVW) +DECLARE_INSN(sloiw, MATCH_SLOIW, MASK_SLOIW) +DECLARE_INSN(sroiw, MATCH_SROIW, MASK_SROIW) +DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW) +DECLARE_INSN(sbclriw, MATCH_SBCLRIW, MASK_SBCLRIW) +DECLARE_INSN(sbsetiw, MATCH_SBSETIW, MASK_SBSETIW) +DECLARE_INSN(sbinviw, MATCH_SBINVIW, MASK_SBINVIW) +DECLARE_INSN(gorciw, MATCH_GORCIW, MASK_GORCIW) +DECLARE_INSN(greviw, MATCH_GREVIW, MASK_GREVIW) +DECLARE_INSN(fslw, MATCH_FSLW, MASK_FSLW) +DECLARE_INSN(fsrw, MATCH_FSRW, MASK_FSRW) +DECLARE_INSN(fsriw, MATCH_FSRIW, MASK_FSRIW) +DECLARE_INSN(clzw, MATCH_CLZW, MASK_CLZW) +DECLARE_INSN(ctzw, MATCH_CTZW, MASK_CTZW) +DECLARE_INSN(cpopw, MATCH_CPOPW, MASK_CPOPW) +DECLARE_INSN(sh1add_uw, MATCH_SH1ADD_UW, MASK_SH1ADD_UW) +DECLARE_INSN(sh2add_uw, MATCH_SH2ADD_UW, MASK_SH2ADD_UW) +DECLARE_INSN(sh3add_uw, MATCH_SH3ADD_UW, MASK_SH3ADD_UW) +DECLARE_INSN(shflw, MATCH_SHFLW, MASK_SHFLW) +DECLARE_INSN(unshflw, MATCH_UNSHFLW, MASK_UNSHFLW) +DECLARE_INSN(bcompressw, MATCH_BCOMPRESSW, MASK_BCOMPRESSW) +DECLARE_INSN(bdecompressw, MATCH_BDECOMPRESSW, MASK_BDECOMPRESSW) +DECLARE_INSN(packw, MATCH_PACKW, MASK_PACKW) +DECLARE_INSN(packuw, MATCH_PACKUW, MASK_PACKUW) +DECLARE_INSN(bfpw, MATCH_BFPW, MASK_BFPW) +DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL) +DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK) +DECLARE_INSN(uret, MATCH_URET, MASK_URET) +DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) +DECLARE_INSN(mret, MATCH_MRET, MASK_MRET) +DECLARE_INSN(dret, MATCH_DRET, MASK_DRET) +DECLARE_INSN(sfence_vma, MATCH_SFENCE_VMA, MASK_SFENCE_VMA) +DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI) +DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW) +DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS) +DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC) +DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI) +DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI) +DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI) DECLARE_INSN(fadd_h, MATCH_FADD_H, MASK_FADD_H) DECLARE_INSN(fsub_h, MATCH_FSUB_H, MASK_FSUB_H) DECLARE_INSN(fmul_h, MATCH_FMUL_H, MASK_FMUL_H) @@ -2733,20 +2721,6 @@ DECLARE_INSN(fcvt_l_h, MATCH_FCVT_L_H, MASK_FCVT_L_H) DECLARE_INSN(fcvt_lu_h, MATCH_FCVT_LU_H, MASK_FCVT_LU_H) DECLARE_INSN(fcvt_h_l, MATCH_FCVT_H_L, MASK_FCVT_H_L) DECLARE_INSN(fcvt_h_lu, MATCH_FCVT_H_LU, MASK_FCVT_H_LU) -DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL) -DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK) -DECLARE_INSN(uret, MATCH_URET, MASK_URET) -DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) -DECLARE_INSN(mret, MATCH_MRET, MASK_MRET) -DECLARE_INSN(dret, MATCH_DRET, MASK_DRET) -DECLARE_INSN(sfence_vma, MATCH_SFENCE_VMA, MASK_SFENCE_VMA) -DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI) -DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW) -DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS) -DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC) -DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI) -DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI) -DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI) DECLARE_INSN(c_nop, MATCH_C_NOP, MASK_C_NOP) DECLARE_INSN(c_addi16sp, MATCH_C_ADDI16SP, MASK_C_ADDI16SP) DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR) @@ -2792,10 +2766,6 @@ DECLARE_INSN(c_addw, MATCH_C_ADDW, MASK_C_ADDW) DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW) DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP) DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP) -DECLARE_INSN(c_lq, MATCH_C_LQ, MASK_C_LQ) -DECLARE_INSN(c_sq, MATCH_C_SQ, MASK_C_SQ) -DECLARE_INSN(c_lqsp, MATCH_C_LQSP, MASK_C_LQSP) -DECLARE_INSN(c_sqsp, MATCH_C_SQSP, MASK_C_SQSP) DECLARE_INSN(custom0, MATCH_CUSTOM0, MASK_CUSTOM0) DECLARE_INSN(custom0_rs1, MATCH_CUSTOM0_RS1, MASK_CUSTOM0_RS1) DECLARE_INSN(custom0_rs1_rs2, MATCH_CUSTOM0_RS1_RS2, MASK_CUSTOM0_RS1_RS2) @@ -3410,6 +3380,10 @@ DECLARE_CSR(tselect, CSR_TSELECT) DECLARE_CSR(tdata1, CSR_TDATA1) DECLARE_CSR(tdata2, CSR_TDATA2) DECLARE_CSR(tdata3, CSR_TDATA3) +DECLARE_CSR(tinfo, CSR_TINFO) +DECLARE_CSR(tcontrol, CSR_TCONTROL) +DECLARE_CSR(mcontext, CSR_MCONTEXT) +DECLARE_CSR(scontext, CSR_SCONTEXT) DECLARE_CSR(dcsr, CSR_DCSR) DECLARE_CSR(dpc, CSR_DPC) DECLARE_CSR(dscratch0, CSR_DSCRATCH0) diff --git a/riscv/insns/addu_w.h b/riscv/insns/add_uw.h index 4b4d9c6..4b4d9c6 100644 --- a/riscv/insns/addu_w.h +++ b/riscv/insns/add_uw.h diff --git a/riscv/insns/addiwu.h b/riscv/insns/addiwu.h deleted file mode 100644 index 5ba1427..0000000 --- a/riscv/insns/addiwu.h +++ /dev/null @@ -1,3 +0,0 @@ -require_rv64; -require_extension('B'); -WRITE_RD(zext32(insn.i_imm() + RS1)); diff --git a/riscv/insns/addwu.h b/riscv/insns/addwu.h deleted file mode 100644 index cc40683..0000000 --- a/riscv/insns/addwu.h +++ /dev/null @@ -1,3 +0,0 @@ -require_rv64; -require_extension('B'); -WRITE_RD(zext32(RS1 + RS2)); diff --git a/riscv/insns/sbclr.h b/riscv/insns/bclr.h index f0b0e0a..f0b0e0a 100644 --- a/riscv/insns/sbclr.h +++ b/riscv/insns/bclr.h diff --git a/riscv/insns/sbclri.h b/riscv/insns/bclri.h index 546dcaa..546dcaa 100644 --- a/riscv/insns/sbclri.h +++ b/riscv/insns/bclri.h diff --git a/riscv/insns/bcompress.h b/riscv/insns/bcompress.h new file mode 100644 index 0000000..b0ed4a8 --- /dev/null +++ b/riscv/insns/bcompress.h @@ -0,0 +1,9 @@ +require_extension('B'); +uint64_t c = 0, i = 0, data = zext_xlen(RS1), mask = zext_xlen(RS2); +while (mask) { + uint64_t b = mask & ~((mask | (mask-1)) + 1); + c |= (data & b) >> (ctz(b) - i); + i += popcount(b); + mask -= b; +} +WRITE_RD(sext_xlen(c)); diff --git a/riscv/insns/bextw.h b/riscv/insns/bcompressw.h index 6837714..6837714 100644 --- a/riscv/insns/bextw.h +++ b/riscv/insns/bcompressw.h diff --git a/riscv/insns/bdep.h b/riscv/insns/bdecompress.h index e71976f..e71976f 100644 --- a/riscv/insns/bdep.h +++ b/riscv/insns/bdecompress.h diff --git a/riscv/insns/bdepw.h b/riscv/insns/bdecompressw.h index 1c06251..1c06251 100644 --- a/riscv/insns/bdepw.h +++ b/riscv/insns/bdecompressw.h diff --git a/riscv/insns/bext.h b/riscv/insns/bext.h index b0ed4a8..7149a2a 100644 --- a/riscv/insns/bext.h +++ b/riscv/insns/bext.h @@ -1,9 +1,3 @@ require_extension('B'); -uint64_t c = 0, i = 0, data = zext_xlen(RS1), mask = zext_xlen(RS2); -while (mask) { - uint64_t b = mask & ~((mask | (mask-1)) + 1); - c |= (data & b) >> (ctz(b) - i); - i += popcount(b); - mask -= b; -} -WRITE_RD(sext_xlen(c)); +int shamt = RS2 & (xlen-1); +WRITE_RD(sext_xlen(1 & (RS1 >> shamt))); diff --git a/riscv/insns/sbexti.h b/riscv/insns/bexti.h index c930cfb..c930cfb 100644 --- a/riscv/insns/sbexti.h +++ b/riscv/insns/bexti.h diff --git a/riscv/insns/sbinv.h b/riscv/insns/binv.h index 5892252..5892252 100644 --- a/riscv/insns/sbinv.h +++ b/riscv/insns/binv.h diff --git a/riscv/insns/sbinvi.h b/riscv/insns/binvi.h index f67143c..f67143c 100644 --- a/riscv/insns/sbinvi.h +++ b/riscv/insns/binvi.h diff --git a/riscv/insns/sbset.h b/riscv/insns/bset.h index 0e3f0fc..0e3f0fc 100644 --- a/riscv/insns/sbset.h +++ b/riscv/insns/bset.h diff --git a/riscv/insns/sbseti.h b/riscv/insns/bseti.h index 44aa8bb..44aa8bb 100644 --- a/riscv/insns/sbseti.h +++ b/riscv/insns/bseti.h diff --git a/riscv/insns/pcnt.h b/riscv/insns/cpop.h index 773e2e1..773e2e1 100644 --- a/riscv/insns/pcnt.h +++ b/riscv/insns/cpop.h diff --git a/riscv/insns/pcntw.h b/riscv/insns/cpopw.h index 13e9ba0..13e9ba0 100644 --- a/riscv/insns/pcntw.h +++ b/riscv/insns/cpopw.h diff --git a/riscv/insns/sbclriw.h b/riscv/insns/sbclriw.h deleted file mode 100644 index 3a26fe0..0000000 --- a/riscv/insns/sbclriw.h +++ /dev/null @@ -1,3 +0,0 @@ -require_extension('B'); -int shamt = SHAMT & 31; -WRITE_RD(sext32(RS1 & ~(1LL << shamt))); diff --git a/riscv/insns/sbclrw.h b/riscv/insns/sbclrw.h deleted file mode 100644 index e089298..0000000 --- a/riscv/insns/sbclrw.h +++ /dev/null @@ -1,3 +0,0 @@ -require_extension('B'); -int shamt = RS2 & 31; -WRITE_RD(sext32(RS1 & ~(1LL << shamt))); diff --git a/riscv/insns/sbext.h b/riscv/insns/sbext.h deleted file mode 100644 index 7149a2a..0000000 --- a/riscv/insns/sbext.h +++ /dev/null @@ -1,3 +0,0 @@ -require_extension('B'); -int shamt = RS2 & (xlen-1); -WRITE_RD(sext_xlen(1 & (RS1 >> shamt))); diff --git a/riscv/insns/sbextw.h b/riscv/insns/sbextw.h deleted file mode 100644 index 1041453..0000000 --- a/riscv/insns/sbextw.h +++ /dev/null @@ -1,3 +0,0 @@ -require_extension('B'); -int shamt = RS2 & 31; -WRITE_RD(sext32(1 & (RS1 >> shamt))); diff --git a/riscv/insns/sbinviw.h b/riscv/insns/sbinviw.h deleted file mode 100644 index 80fef91..0000000 --- a/riscv/insns/sbinviw.h +++ /dev/null @@ -1,3 +0,0 @@ -require_extension('B'); -int shamt = SHAMT & 31; -WRITE_RD(sext32(RS1 ^ (1LL << shamt))); diff --git a/riscv/insns/sbinvw.h b/riscv/insns/sbinvw.h deleted file mode 100644 index 1b9ccfd..0000000 --- a/riscv/insns/sbinvw.h +++ /dev/null @@ -1,3 +0,0 @@ -require_extension('B'); -int shamt = RS2 & 31; -WRITE_RD(sext32(RS1 ^ (1LL << shamt))); diff --git a/riscv/insns/sbsetiw.h b/riscv/insns/sbsetiw.h deleted file mode 100644 index dcfc6b1..0000000 --- a/riscv/insns/sbsetiw.h +++ /dev/null @@ -1,3 +0,0 @@ -require_extension('B'); -int shamt = SHAMT & 31; -WRITE_RD(sext32(RS1 | (1LL << shamt))); diff --git a/riscv/insns/sbsetw.h b/riscv/insns/sbsetw.h deleted file mode 100644 index c65199a..0000000 --- a/riscv/insns/sbsetw.h +++ /dev/null @@ -1,3 +0,0 @@ -require_extension('B'); -int shamt = RS2 & 31; -WRITE_RD(sext32(RS1 | (1LL << shamt))); diff --git a/riscv/insns/sh1addu_w.h b/riscv/insns/sh1add_uw.h index 7456958..7456958 100644 --- a/riscv/insns/sh1addu_w.h +++ b/riscv/insns/sh1add_uw.h diff --git a/riscv/insns/sh2addu_w.h b/riscv/insns/sh2add_uw.h index 9948980..9948980 100644 --- a/riscv/insns/sh2addu_w.h +++ b/riscv/insns/sh2add_uw.h diff --git a/riscv/insns/sh3addu_w.h b/riscv/insns/sh3add_uw.h index e41a65d..e41a65d 100644 --- a/riscv/insns/sh3addu_w.h +++ b/riscv/insns/sh3add_uw.h diff --git a/riscv/insns/slliu_w.h b/riscv/insns/slli_uw.h index 99ac5f8..99ac5f8 100644 --- a/riscv/insns/slliu_w.h +++ b/riscv/insns/slli_uw.h diff --git a/riscv/insns/subwu.h b/riscv/insns/subwu.h deleted file mode 100644 index a97f6d7..0000000 --- a/riscv/insns/subwu.h +++ /dev/null @@ -1,3 +0,0 @@ -require_rv64; -require_extension('B'); -WRITE_RD(zext32(RS1 - RS2)); diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 62d537d..bdf9f37 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -334,31 +334,26 @@ riscv_insn_ext_q = \ fsub_q \ riscv_insn_ext_b = \ - addiwu \ - addu_w \ - addwu \ + add_uw \ andn \ - bdep \ - bdepw \ - bext \ - bextw \ + bdecompress \ + bdecompressw \ + bcompress \ + bcompressw \ bfp \ bfpw \ bmatflip \ bmator \ bmatxor \ sh1add \ - sh1addu_w \ + sh1add_uw \ sh2add \ - sh2addu_w \ + sh2add_uw \ sh3add \ - sh3addu_w \ + sh3add_uw \ clmul \ clmulh \ - clmulhw \ clmulr \ - clmulrw \ - clmulw \ clz \ clzw \ cmix \ @@ -397,35 +392,28 @@ riscv_insn_ext_b = \ packu \ packuw \ packw \ - pcnt \ - pcntw \ + cpop \ + cpopw \ rol \ rolw \ ror \ rori \ roriw \ rorw \ - sbclr \ - sbclri \ - sbclriw \ - sbclrw \ - sbext \ - sbexti \ - sbextw \ - sbinv \ - sbinvi \ - sbinviw \ - sbinvw \ - sbset \ - sbseti \ - sbsetiw \ - sbsetw \ + bclr \ + bclri \ + bext \ + bexti \ + binv \ + binvi \ + bset \ + bseti \ sext_b \ sext_h \ shfl \ shfli \ shflw \ - slliu_w \ + slli_uw \ slo \ sloi \ sloiw \ @@ -434,7 +422,6 @@ riscv_insn_ext_b = \ sroi \ sroiw \ srow \ - subwu \ unshfl \ unshfli \ unshflw \ |