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authorTim Newsome <tim@sifive.com>2022-03-16 10:07:46 -0700
committerTim Newsome <tim@sifive.com>2022-03-30 10:41:45 -0700
commit9bd1f818aee132ca6434e0ecaf168821024b1adc (patch)
tree87813263336274e0478c9344a299f64055cafe38 /riscv
parent59f594a756ab68ec3f9010f5cc9f138be227f6ef (diff)
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Move tdata1 read logic into triggers.cc.
Diffstat (limited to 'riscv')
-rw-r--r--riscv/csrs.cc20
-rw-r--r--riscv/triggers.cc22
-rw-r--r--riscv/triggers.h1
3 files changed, 24 insertions, 19 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc
index db07ce4..29cc0fe 100644
--- a/riscv/csrs.cc
+++ b/riscv/csrs.cc
@@ -991,25 +991,7 @@ tdata1_csr_t::tdata1_csr_t(processor_t* const proc, const reg_t addr):
}
reg_t tdata1_csr_t::read() const noexcept {
- reg_t v = 0;
- auto xlen = proc->get_xlen();
- triggers::mcontrol_t *mc = proc->TM.triggers[state->tselect->read()];
- v = set_field(v, MCONTROL_TYPE(xlen), mc->type);
- v = set_field(v, MCONTROL_DMODE(xlen), mc->dmode);
- v = set_field(v, MCONTROL_MASKMAX(xlen), mc->maskmax);
- v = set_field(v, MCONTROL_SELECT, mc->select);
- v = set_field(v, MCONTROL_TIMING, mc->timing);
- v = set_field(v, MCONTROL_ACTION, mc->action);
- v = set_field(v, MCONTROL_CHAIN, mc->chain);
- v = set_field(v, MCONTROL_MATCH, mc->match);
- v = set_field(v, MCONTROL_M, mc->m);
- v = set_field(v, MCONTROL_H, mc->h);
- v = set_field(v, MCONTROL_S, mc->s);
- v = set_field(v, MCONTROL_U, mc->u);
- v = set_field(v, MCONTROL_EXECUTE, mc->execute);
- v = set_field(v, MCONTROL_STORE, mc->store);
- v = set_field(v, MCONTROL_LOAD, mc->load);
- return v;
+ return proc->TM.triggers[state->tselect->read()]->tdata1_read(proc);
}
bool tdata1_csr_t::unlogged_write(const reg_t val) noexcept {
diff --git a/riscv/triggers.cc b/riscv/triggers.cc
index fd295f7..7fb5e8c 100644
--- a/riscv/triggers.cc
+++ b/riscv/triggers.cc
@@ -1,3 +1,4 @@
+#include "processor.h"
#include "triggers.h"
namespace triggers {
@@ -9,6 +10,27 @@ mcontrol_t::mcontrol_t() :
{
}
+reg_t mcontrol_t::tdata1_read(const processor_t *proc) const noexcept {
+ reg_t v = 0;
+ auto xlen = proc->get_xlen();
+ v = set_field(v, MCONTROL_TYPE(xlen), type);
+ v = set_field(v, MCONTROL_DMODE(xlen), dmode);
+ v = set_field(v, MCONTROL_MASKMAX(xlen), maskmax);
+ v = set_field(v, MCONTROL_SELECT, select);
+ v = set_field(v, MCONTROL_TIMING, timing);
+ v = set_field(v, MCONTROL_ACTION, action);
+ v = set_field(v, MCONTROL_CHAIN, chain);
+ v = set_field(v, MCONTROL_MATCH, match);
+ v = set_field(v, MCONTROL_M, m);
+ v = set_field(v, MCONTROL_H, h);
+ v = set_field(v, MCONTROL_S, s);
+ v = set_field(v, MCONTROL_U, u);
+ v = set_field(v, MCONTROL_EXECUTE, execute);
+ v = set_field(v, MCONTROL_STORE, store);
+ v = set_field(v, MCONTROL_LOAD, load);
+ return v;
+}
+
module_t::module_t(unsigned count) : triggers(count) {
for (unsigned i = 0; i < count; i++) {
triggers[i] = new mcontrol_t();
diff --git a/riscv/triggers.h b/riscv/triggers.h
index bcafcdd..25fdd66 100644
--- a/riscv/triggers.h
+++ b/riscv/triggers.h
@@ -44,6 +44,7 @@ public:
} match_t;
mcontrol_t();
+ reg_t tdata1_read(const processor_t *proc) const noexcept;
uint8_t type;
uint8_t maskmax;