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| author | Stephen Twigg <sdtwigg@eecs.berkeley.edu> | 2014-04-03 16:52:48 -0700 |
|---|---|---|
| committer | Stephen Twigg <sdtwigg@eecs.berkeley.edu> | 2014-04-03 16:52:48 -0700 |
| commit | 97c0aa44d34834515ddb8c43a9e4583dc95d9808 (patch) | |
| tree | 8face28836501e49a5186f798658b2e24acb5e33 /riscv | |
| parent | 963c0825a720fadd3de03df18d772a2f5a54a65a (diff) | |
| download | spike-97c0aa44d34834515ddb8c43a9e4583dc95d9808.zip spike-97c0aa44d34834515ddb8c43a9e4583dc95d9808.tar.gz spike-97c0aa44d34834515ddb8c43a9e4583dc95d9808.tar.bz2 | |
Sync encoding in opcodes
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/encoding.h | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/riscv/encoding.h b/riscv/encoding.h index 5530699..089a8a9 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -414,6 +414,7 @@ #define CSR_FFLAGS 0x1 #define CSR_FRM 0x2 #define CSR_FCSR 0x3 +#define CSR_STATS 0xc0 #define CSR_SUP0 0x500 #define CSR_SUP1 0x501 #define CSR_EPC 0x502 @@ -430,7 +431,6 @@ #define CSR_FATC 0x50d #define CSR_SEND_IPI 0x50e #define CSR_CLEAR_IPI 0x50f -#define CSR_STATS 0x51c #define CSR_RESET 0x51d #define CSR_TOHOST 0x51e #define CSR_FROMHOST 0x51f @@ -453,6 +453,10 @@ #define CSR_UARCH13 0xccd #define CSR_UARCH14 0xcce #define CSR_UARCH15 0xccf +#define CSR_COUNTH 0x586 +#define CSR_CYCLEH 0xc80 +#define CSR_TIMEH 0xc81 +#define CSR_INSTRETH 0xc82 #define CAUSE_MISALIGNED_FETCH 0x0 #define CAUSE_FAULT_FETCH 0x1 #define CAUSE_ILLEGAL_INSTRUCTION 0x2 @@ -629,6 +633,7 @@ DECLARE_INSN(sd, MATCH_SD, MASK_SD) DECLARE_CSR(fflags, CSR_FFLAGS) DECLARE_CSR(frm, CSR_FRM) DECLARE_CSR(fcsr, CSR_FCSR) +DECLARE_CSR(stats, CSR_STATS) DECLARE_CSR(sup0, CSR_SUP0) DECLARE_CSR(sup1, CSR_SUP1) DECLARE_CSR(epc, CSR_EPC) @@ -645,7 +650,6 @@ DECLARE_CSR(impl, CSR_IMPL) DECLARE_CSR(fatc, CSR_FATC) DECLARE_CSR(send_ipi, CSR_SEND_IPI) DECLARE_CSR(clear_ipi, CSR_CLEAR_IPI) -DECLARE_CSR(stats, CSR_STATS) DECLARE_CSR(reset, CSR_RESET) DECLARE_CSR(tohost, CSR_TOHOST) DECLARE_CSR(fromhost, CSR_FROMHOST) @@ -668,11 +672,16 @@ DECLARE_CSR(uarch12, CSR_UARCH12) DECLARE_CSR(uarch13, CSR_UARCH13) DECLARE_CSR(uarch14, CSR_UARCH14) DECLARE_CSR(uarch15, CSR_UARCH15) +DECLARE_CSR(counth, CSR_COUNTH) +DECLARE_CSR(cycleh, CSR_CYCLEH) +DECLARE_CSR(timeh, CSR_TIMEH) +DECLARE_CSR(instreth, CSR_INSTRETH) #endif #ifdef DECLARE_CAUSE DECLARE_CAUSE("fflags", CAUSE_FFLAGS) DECLARE_CAUSE("frm", CAUSE_FRM) DECLARE_CAUSE("fcsr", CAUSE_FCSR) +DECLARE_CAUSE("stats", CAUSE_STATS) DECLARE_CAUSE("sup0", CAUSE_SUP0) DECLARE_CAUSE("sup1", CAUSE_SUP1) DECLARE_CAUSE("epc", CAUSE_EPC) @@ -689,7 +698,6 @@ DECLARE_CAUSE("impl", CAUSE_IMPL) DECLARE_CAUSE("fatc", CAUSE_FATC) DECLARE_CAUSE("send_ipi", CAUSE_SEND_IPI) DECLARE_CAUSE("clear_ipi", CAUSE_CLEAR_IPI) -DECLARE_CAUSE("stats", CAUSE_STATS) DECLARE_CAUSE("reset", CAUSE_RESET) DECLARE_CAUSE("tohost", CAUSE_TOHOST) DECLARE_CAUSE("fromhost", CAUSE_FROMHOST) @@ -712,4 +720,8 @@ DECLARE_CAUSE("uarch12", CAUSE_UARCH12) DECLARE_CAUSE("uarch13", CAUSE_UARCH13) DECLARE_CAUSE("uarch14", CAUSE_UARCH14) DECLARE_CAUSE("uarch15", CAUSE_UARCH15) +DECLARE_CAUSE("counth", CAUSE_COUNTH) +DECLARE_CAUSE("cycleh", CAUSE_CYCLEH) +DECLARE_CAUSE("timeh", CAUSE_TIMEH) +DECLARE_CAUSE("instreth", CAUSE_INSTRETH) #endif |