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authorAndrew Waterman <andrew@sifive.com>2021-09-06 18:31:20 -0700
committerAndrew Waterman <andrew@sifive.com>2021-09-06 18:31:20 -0700
commit686674dc15c1734940614c8f59419e9f94d51a52 (patch)
treec0edd06e8b77b01e335f5f7f7bc098baeb62aac1 /riscv
parenta718f061d71a316b7190469a53fd4834c0d41ae8 (diff)
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Move bitmanip instructions outside Zba/Zbb/Zbc/Zbs into Xbitmanip
Diffstat (limited to 'riscv')
-rw-r--r--riscv/insns/bcompress.h2
-rw-r--r--riscv/insns/bcompressw.h2
-rw-r--r--riscv/insns/bdecompress.h2
-rw-r--r--riscv/insns/bdecompressw.h2
-rw-r--r--riscv/insns/bfp.h2
-rw-r--r--riscv/insns/bfpw.h2
-rw-r--r--riscv/insns/bmatflip.h2
-rw-r--r--riscv/insns/bmator.h2
-rw-r--r--riscv/insns/bmatxor.h2
-rw-r--r--riscv/insns/clmulhw.h2
-rw-r--r--riscv/insns/clmulrw.h2
-rw-r--r--riscv/insns/clmulw.h2
-rw-r--r--riscv/insns/cmix.h2
-rw-r--r--riscv/insns/cmov.h2
-rw-r--r--riscv/insns/crc32_b.h2
-rw-r--r--riscv/insns/crc32_d.h2
-rw-r--r--riscv/insns/crc32_h.h2
-rw-r--r--riscv/insns/crc32_w.h2
-rw-r--r--riscv/insns/crc32c_b.h2
-rw-r--r--riscv/insns/crc32c_d.h2
-rw-r--r--riscv/insns/crc32c_h.h2
-rw-r--r--riscv/insns/crc32c_w.h2
-rw-r--r--riscv/insns/fsl.h2
-rw-r--r--riscv/insns/fslw.h2
-rw-r--r--riscv/insns/fsr.h2
-rw-r--r--riscv/insns/fsri.h2
-rw-r--r--riscv/insns/fsriw.h2
-rw-r--r--riscv/insns/fsrw.h2
-rw-r--r--riscv/insns/gorc.h2
-rw-r--r--riscv/insns/gorci.h2
-rw-r--r--riscv/insns/gorciw.h2
-rw-r--r--riscv/insns/gorcw.h2
-rw-r--r--riscv/insns/grev.h2
-rw-r--r--riscv/insns/grevi.h2
-rw-r--r--riscv/insns/greviw.h2
-rw-r--r--riscv/insns/grevw.h2
-rw-r--r--riscv/insns/pack.h2
-rw-r--r--riscv/insns/packh.h2
-rw-r--r--riscv/insns/packu.h2
-rw-r--r--riscv/insns/packuw.h2
-rw-r--r--riscv/insns/packw.h2
-rw-r--r--riscv/insns/shfl.h2
-rw-r--r--riscv/insns/shfli.h2
-rw-r--r--riscv/insns/shflw.h2
-rw-r--r--riscv/insns/slo.h2
-rw-r--r--riscv/insns/sloi.h2
-rw-r--r--riscv/insns/sloiw.h2
-rw-r--r--riscv/insns/slow.h2
-rw-r--r--riscv/insns/sro.h2
-rw-r--r--riscv/insns/sroi.h2
-rw-r--r--riscv/insns/sroiw.h2
-rw-r--r--riscv/insns/srow.h2
-rw-r--r--riscv/insns/unshfl.h2
-rw-r--r--riscv/insns/unshfli.h2
-rw-r--r--riscv/insns/unshflw.h2
-rw-r--r--riscv/insns/xperm_b.h2
-rw-r--r--riscv/insns/xperm_h.h2
-rw-r--r--riscv/insns/xperm_n.h2
-rw-r--r--riscv/insns/xperm_w.h2
-rw-r--r--riscv/processor.cc4
-rw-r--r--riscv/processor.h1
61 files changed, 63 insertions, 60 deletions
diff --git a/riscv/insns/bcompress.h b/riscv/insns/bcompress.h
index b0ed4a8..aaafbe3 100644
--- a/riscv/insns/bcompress.h
+++ b/riscv/insns/bcompress.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
uint64_t c = 0, i = 0, data = zext_xlen(RS1), mask = zext_xlen(RS2);
while (mask) {
uint64_t b = mask & ~((mask | (mask-1)) + 1);
diff --git a/riscv/insns/bcompressw.h b/riscv/insns/bcompressw.h
index 6837714..7fe2593 100644
--- a/riscv/insns/bcompressw.h
+++ b/riscv/insns/bcompressw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
uint64_t c = 0, i = 0, data = zext32(RS1), mask = zext32(RS2);
while (mask) {
uint64_t b = mask & ~((mask | (mask-1)) + 1);
diff --git a/riscv/insns/bdecompress.h b/riscv/insns/bdecompress.h
index e71976f..b5bfe3b 100644
--- a/riscv/insns/bdecompress.h
+++ b/riscv/insns/bdecompress.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
uint64_t c = 0, i = 0, data = zext_xlen(RS1), mask = zext_xlen(RS2);
while (mask) {
uint64_t b = mask & ~((mask | (mask-1)) + 1);
diff --git a/riscv/insns/bdecompressw.h b/riscv/insns/bdecompressw.h
index 1c06251..836d376 100644
--- a/riscv/insns/bdecompressw.h
+++ b/riscv/insns/bdecompressw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
uint64_t c = 0, i = 0, data = zext32(RS1), mask = zext32(RS2);
while (mask) {
uint64_t b = mask & ~((mask | (mask-1)) + 1);
diff --git a/riscv/insns/bfp.h b/riscv/insns/bfp.h
index 96e6cfc..1b63ffb 100644
--- a/riscv/insns/bfp.h
+++ b/riscv/insns/bfp.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t cfg = RS2 >> (xlen/2);
if ((cfg >> 30) == 2)
cfg = cfg >> 16;
diff --git a/riscv/insns/bfpw.h b/riscv/insns/bfpw.h
index 3a2cd12..bd04119 100644
--- a/riscv/insns/bfpw.h
+++ b/riscv/insns/bfpw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t cfg = RS2 >> 16;
int len = (cfg >> 8) & 15;
int off = cfg & 31;
diff --git a/riscv/insns/bmatflip.h b/riscv/insns/bmatflip.h
index e137f10..2ddf1c4 100644
--- a/riscv/insns/bmatflip.h
+++ b/riscv/insns/bmatflip.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = RS1;
for (int i = 0; i < 3; i++) {
x = (x & 0xFFFF00000000FFFFLL) | ((x & 0x0000FFFF00000000LL) >> 16) | ((x & 0x00000000FFFF0000LL) << 16);
diff --git a/riscv/insns/bmator.h b/riscv/insns/bmator.h
index 2d57228..7a1237f 100644
--- a/riscv/insns/bmator.h
+++ b/riscv/insns/bmator.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
// transpose of rs2
int64_t rs2t = RS2;
diff --git a/riscv/insns/bmatxor.h b/riscv/insns/bmatxor.h
index e4dedfd..094e828 100644
--- a/riscv/insns/bmatxor.h
+++ b/riscv/insns/bmatxor.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
// transpose of rs2
int64_t rs2t = RS2;
diff --git a/riscv/insns/clmulhw.h b/riscv/insns/clmulhw.h
index 75f64ec..1fc0942 100644
--- a/riscv/insns/clmulhw.h
+++ b/riscv/insns/clmulhw.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t a = zext32(RS1), b = zext32(RS2), x = 0;
for (int i = 1; i < 32; i++)
if ((b >> i) & 1)
diff --git a/riscv/insns/clmulrw.h b/riscv/insns/clmulrw.h
index 6fc9008..bc7510d 100644
--- a/riscv/insns/clmulrw.h
+++ b/riscv/insns/clmulrw.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t a = zext32(RS1), b = zext32(RS2), x = 0;
for (int i = 0; i < 32; i++)
if ((b >> i) & 1)
diff --git a/riscv/insns/clmulw.h b/riscv/insns/clmulw.h
index 69d0f43..83ecebb 100644
--- a/riscv/insns/clmulw.h
+++ b/riscv/insns/clmulw.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t a = zext32(RS1), b = zext32(RS2), x = 0;
for (int i = 0; i < 32; i++)
if ((b >> i) & 1)
diff --git a/riscv/insns/cmix.h b/riscv/insns/cmix.h
index 727f136..0bc99ec 100644
--- a/riscv/insns/cmix.h
+++ b/riscv/insns/cmix.h
@@ -1,2 +1,2 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD((RS1 & RS2) | (RS3 & ~RS2));
diff --git a/riscv/insns/cmov.h b/riscv/insns/cmov.h
index eeae7e2..eef025f 100644
--- a/riscv/insns/cmov.h
+++ b/riscv/insns/cmov.h
@@ -1,2 +1,2 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(RS2 ? RS1 : RS3);
diff --git a/riscv/insns/crc32_b.h b/riscv/insns/crc32_b.h
index b000e64..1297852 100644
--- a/riscv/insns/crc32_b.h
+++ b/riscv/insns/crc32_b.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 8; i++)
x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
diff --git a/riscv/insns/crc32_d.h b/riscv/insns/crc32_d.h
index 7b031a8..0bc08d2 100644
--- a/riscv/insns/crc32_d.h
+++ b/riscv/insns/crc32_d.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 64; i++)
x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
diff --git a/riscv/insns/crc32_h.h b/riscv/insns/crc32_h.h
index 91bb253..73e7683 100644
--- a/riscv/insns/crc32_h.h
+++ b/riscv/insns/crc32_h.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 16; i++)
x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
diff --git a/riscv/insns/crc32_w.h b/riscv/insns/crc32_w.h
index 2ad4a30..7b328f9 100644
--- a/riscv/insns/crc32_w.h
+++ b/riscv/insns/crc32_w.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 32; i++)
x = (x >> 1) ^ (0xEDB88320 & ~((x&1)-1));
diff --git a/riscv/insns/crc32c_b.h b/riscv/insns/crc32c_b.h
index 077b370..30312d8 100644
--- a/riscv/insns/crc32c_b.h
+++ b/riscv/insns/crc32c_b.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 8; i++)
x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
diff --git a/riscv/insns/crc32c_d.h b/riscv/insns/crc32c_d.h
index 5a9a6e5..0595087 100644
--- a/riscv/insns/crc32c_d.h
+++ b/riscv/insns/crc32c_d.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 64; i++)
x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
diff --git a/riscv/insns/crc32c_h.h b/riscv/insns/crc32c_h.h
index 62718b5..8e34ce2 100644
--- a/riscv/insns/crc32c_h.h
+++ b/riscv/insns/crc32c_h.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 16; i++)
x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
diff --git a/riscv/insns/crc32c_w.h b/riscv/insns/crc32c_w.h
index 754d7bb..c3ca1a8 100644
--- a/riscv/insns/crc32c_w.h
+++ b/riscv/insns/crc32c_w.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = zext_xlen(RS1);
for (int i = 0; i < 32; i++)
x = (x >> 1) ^ (0x82F63B78 & ~((x&1)-1));
diff --git a/riscv/insns/fsl.h b/riscv/insns/fsl.h
index fdf02ad..c39133c 100644
--- a/riscv/insns/fsl.h
+++ b/riscv/insns/fsl.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
int shamt = RS2 & (2*xlen-1);
reg_t a = RS1, b = RS3;
if (shamt >= xlen) {
diff --git a/riscv/insns/fslw.h b/riscv/insns/fslw.h
index 04ab04f..de69fd2 100644
--- a/riscv/insns/fslw.h
+++ b/riscv/insns/fslw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
int shamt = RS2 & 63;
reg_t a = RS1, b = RS3;
if (shamt >= 32) {
diff --git a/riscv/insns/fsr.h b/riscv/insns/fsr.h
index 18a1e69..50d78f1 100644
--- a/riscv/insns/fsr.h
+++ b/riscv/insns/fsr.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
int shamt = RS2 & (2*xlen-1);
reg_t a = RS1, b = RS3;
if (shamt >= xlen) {
diff --git a/riscv/insns/fsri.h b/riscv/insns/fsri.h
index 2d41c82..822b8fa 100644
--- a/riscv/insns/fsri.h
+++ b/riscv/insns/fsri.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
int shamt = SHAMT & (2*xlen-1);
reg_t a = RS1, b = RS3;
if (shamt >= xlen) {
diff --git a/riscv/insns/fsriw.h b/riscv/insns/fsriw.h
index 31983c9..bfe64f2 100644
--- a/riscv/insns/fsriw.h
+++ b/riscv/insns/fsriw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
int shamt = SHAMT & 63;
reg_t a = RS1, b = RS3;
if (shamt >= 32) {
diff --git a/riscv/insns/fsrw.h b/riscv/insns/fsrw.h
index 1511fbe..7320bda 100644
--- a/riscv/insns/fsrw.h
+++ b/riscv/insns/fsrw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
int shamt = RS2 & 63;
reg_t a = RS1, b = RS3;
if (shamt >= 32) {
diff --git a/riscv/insns/gorc.h b/riscv/insns/gorc.h
index 097ba9b..08e7e67 100644
--- a/riscv/insns/gorc.h
+++ b/riscv/insns/gorc.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = RS1;
int shamt = RS2 & (xlen-1);
if (shamt & 1) x |= ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
diff --git a/riscv/insns/gorci.h b/riscv/insns/gorci.h
index a7fc810..b2e8fe8 100644
--- a/riscv/insns/gorci.h
+++ b/riscv/insns/gorci.h
@@ -2,7 +2,7 @@
if (SHAMT == 7)
require_extension(EXT_ZBB);
else
- require_extension('B');
+ require_extension(EXT_XBITMANIP);
require(SHAMT < xlen);
reg_t x = RS1;
diff --git a/riscv/insns/gorciw.h b/riscv/insns/gorciw.h
index 27bc753..a4e7f71 100644
--- a/riscv/insns/gorciw.h
+++ b/riscv/insns/gorciw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
require(SHAMT < 32);
reg_t x = RS1;
int shamt = SHAMT;
diff --git a/riscv/insns/gorcw.h b/riscv/insns/gorcw.h
index 88642fb..04c6bdc 100644
--- a/riscv/insns/gorcw.h
+++ b/riscv/insns/gorcw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = RS1;
int shamt = RS2 & 31;
if (shamt & 1) x |= ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
diff --git a/riscv/insns/grev.h b/riscv/insns/grev.h
index b13fa5a..0533486 100644
--- a/riscv/insns/grev.h
+++ b/riscv/insns/grev.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = RS1;
int shamt = RS2 & (xlen-1);
if (shamt & 1) x = ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
diff --git a/riscv/insns/grevi.h b/riscv/insns/grevi.h
index 46d04dd..c225176 100644
--- a/riscv/insns/grevi.h
+++ b/riscv/insns/grevi.h
@@ -2,7 +2,7 @@
if (SHAMT == xlen - 8)
require_extension(EXT_ZBB);
else
- require_extension('B');
+ require_extension(EXT_XBITMANIP);
require(SHAMT < xlen);
reg_t x = RS1;
diff --git a/riscv/insns/greviw.h b/riscv/insns/greviw.h
index 500096d..d845eb9 100644
--- a/riscv/insns/greviw.h
+++ b/riscv/insns/greviw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
require(SHAMT < 32);
reg_t x = RS1;
int shamt = SHAMT;
diff --git a/riscv/insns/grevw.h b/riscv/insns/grevw.h
index 274dd6f..63dbe52 100644
--- a/riscv/insns/grevw.h
+++ b/riscv/insns/grevw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = RS1;
int shamt = RS2 & 31;
if (shamt & 1) x = ((x & 0x5555555555555555LL) << 1) | ((x & 0xAAAAAAAAAAAAAAAALL) >> 1);
diff --git a/riscv/insns/pack.h b/riscv/insns/pack.h
index cde3bd1..c567f73 100644
--- a/riscv/insns/pack.h
+++ b/riscv/insns/pack.h
@@ -2,7 +2,7 @@
if (insn.rs2() == 0 && xlen == 32)
require_extension(EXT_ZBB);
else
- require_extension('B');
+ require_extension(EXT_XBITMANIP);
reg_t lo = zext_xlen(RS1 << (xlen/2)) >> (xlen/2);
reg_t hi = zext_xlen(RS2 << (xlen/2));
diff --git a/riscv/insns/packh.h b/riscv/insns/packh.h
index 34a95c8..4198d24 100644
--- a/riscv/insns/packh.h
+++ b/riscv/insns/packh.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t lo = zext_xlen(RS1 << (xlen-8)) >> (xlen-8);
reg_t hi = zext_xlen(RS2 << (xlen-8)) >> (xlen-16);
WRITE_RD(sext_xlen(lo | hi));
diff --git a/riscv/insns/packu.h b/riscv/insns/packu.h
index 25cc9c2..25a238a 100644
--- a/riscv/insns/packu.h
+++ b/riscv/insns/packu.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t lo = zext_xlen(RS1) >> (xlen/2);
reg_t hi = zext_xlen(RS2) >> (xlen/2) << (xlen/2);
WRITE_RD(sext_xlen(lo | hi));
diff --git a/riscv/insns/packuw.h b/riscv/insns/packuw.h
index c71838b..1156a2b 100644
--- a/riscv/insns/packuw.h
+++ b/riscv/insns/packuw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t lo = zext32(RS1) >> 16;
reg_t hi = zext32(RS2) >> 16 << 16;
WRITE_RD(sext32(lo | hi));
diff --git a/riscv/insns/packw.h b/riscv/insns/packw.h
index b2f335a..4cf2c12 100644
--- a/riscv/insns/packw.h
+++ b/riscv/insns/packw.h
@@ -2,7 +2,7 @@
if (insn.rs2() == 0)
require_extension(EXT_ZBB);
else
- require_extension('B');
+ require_extension(EXT_XBITMANIP);
require_rv64;
reg_t lo = zext32(RS1 << 16) >> 16;
diff --git a/riscv/insns/shfl.h b/riscv/insns/shfl.h
index 0bd87d3..77a1bd4 100644
--- a/riscv/insns/shfl.h
+++ b/riscv/insns/shfl.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = RS1;
int shamt = RS2 & ((xlen-1) >> 1);
if (shamt & 16) x = (x & 0xFFFF00000000FFFFLL) | ((x & 0x0000FFFF00000000LL) >> 16) | ((x & 0x00000000FFFF0000LL) << 16);
diff --git a/riscv/insns/shfli.h b/riscv/insns/shfli.h
index 59fbcff..e24f1bc 100644
--- a/riscv/insns/shfli.h
+++ b/riscv/insns/shfli.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
require(SHAMT < (xlen/2));
reg_t x = RS1;
int shamt = SHAMT & ((xlen-1) >> 1);
diff --git a/riscv/insns/shflw.h b/riscv/insns/shflw.h
index 8239a98..af89d2c 100644
--- a/riscv/insns/shflw.h
+++ b/riscv/insns/shflw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = RS1;
int shamt = RS2 & 15;
if (shamt & 8) x = (x & 0xFF0000FFFF0000FFLL) | ((x & 0x00FF000000FF0000LL) >> 8) | ((x & 0x0000FF000000FF00LL) << 8);
diff --git a/riscv/insns/slo.h b/riscv/insns/slo.h
index 0836cf8..9aa5777 100644
--- a/riscv/insns/slo.h
+++ b/riscv/insns/slo.h
@@ -1,2 +1,2 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext_xlen(~((~RS1) << (RS2 & (xlen-1)))));
diff --git a/riscv/insns/sloi.h b/riscv/insns/sloi.h
index 216cf9c..17e6936 100644
--- a/riscv/insns/sloi.h
+++ b/riscv/insns/sloi.h
@@ -1,3 +1,3 @@
require(SHAMT < xlen);
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext_xlen(~((~RS1) << SHAMT)));
diff --git a/riscv/insns/sloiw.h b/riscv/insns/sloiw.h
index 5ec7576..af25f73 100644
--- a/riscv/insns/sloiw.h
+++ b/riscv/insns/sloiw.h
@@ -1,3 +1,3 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext32(~((~RS1) << SHAMT)));
diff --git a/riscv/insns/slow.h b/riscv/insns/slow.h
index 2f958c6..6cb1a9c 100644
--- a/riscv/insns/slow.h
+++ b/riscv/insns/slow.h
@@ -1,3 +1,3 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext32(~((~RS1) << (RS2 & 0x1F))));
diff --git a/riscv/insns/sro.h b/riscv/insns/sro.h
index 841a960..4c243f7 100644
--- a/riscv/insns/sro.h
+++ b/riscv/insns/sro.h
@@ -1,2 +1,2 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext_xlen(~((zext_xlen(~RS1)) >> (RS2 & (xlen-1)))));
diff --git a/riscv/insns/sroi.h b/riscv/insns/sroi.h
index 46eb840..fea997f 100644
--- a/riscv/insns/sroi.h
+++ b/riscv/insns/sroi.h
@@ -1,3 +1,3 @@
require(SHAMT < xlen);
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext_xlen(~((zext_xlen(~RS1)) >> SHAMT)));
diff --git a/riscv/insns/sroiw.h b/riscv/insns/sroiw.h
index 671af39..32b4ef9 100644
--- a/riscv/insns/sroiw.h
+++ b/riscv/insns/sroiw.h
@@ -1,3 +1,3 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext32(~((~(uint32_t)RS1) >> SHAMT)));
diff --git a/riscv/insns/srow.h b/riscv/insns/srow.h
index 74ba73e..d5d673c 100644
--- a/riscv/insns/srow.h
+++ b/riscv/insns/srow.h
@@ -1,3 +1,3 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext32(~((~(uint32_t)RS1) >> (RS2 & 0x1F))));
diff --git a/riscv/insns/unshfl.h b/riscv/insns/unshfl.h
index b14bc29..9a8e90f 100644
--- a/riscv/insns/unshfl.h
+++ b/riscv/insns/unshfl.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = RS1;
int shamt = RS2 & ((xlen-1) >> 1);
if (shamt & 1) x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >> 1) | ((x & 0x2222222222222222LL) << 1);
diff --git a/riscv/insns/unshfli.h b/riscv/insns/unshfli.h
index fbe8364..2c8c5f9 100644
--- a/riscv/insns/unshfli.h
+++ b/riscv/insns/unshfli.h
@@ -1,4 +1,4 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
require(SHAMT < (xlen/2));
reg_t x = RS1;
int shamt = SHAMT & ((xlen-1) >> 1);
diff --git a/riscv/insns/unshflw.h b/riscv/insns/unshflw.h
index de5ceb5..27d6370 100644
--- a/riscv/insns/unshflw.h
+++ b/riscv/insns/unshflw.h
@@ -1,5 +1,5 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
reg_t x = RS1;
int shamt = RS2 & 15;
if (shamt & 1) x = (x & 0x9999999999999999LL) | ((x & 0x4444444444444444LL) >> 1) | ((x & 0x2222222222222222LL) << 1);
diff --git a/riscv/insns/xperm_b.h b/riscv/insns/xperm_b.h
index 5efab42..37036ff 100644
--- a/riscv/insns/xperm_b.h
+++ b/riscv/insns/xperm_b.h
@@ -1,2 +1,2 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext_xlen(xperm(RS1, RS2, 3, xlen)));
diff --git a/riscv/insns/xperm_h.h b/riscv/insns/xperm_h.h
index 3d80dbc..dee8e9b 100644
--- a/riscv/insns/xperm_h.h
+++ b/riscv/insns/xperm_h.h
@@ -1,2 +1,2 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext_xlen(xperm(RS1, RS2, 4, xlen)));
diff --git a/riscv/insns/xperm_n.h b/riscv/insns/xperm_n.h
index f02525a..f42537e 100644
--- a/riscv/insns/xperm_n.h
+++ b/riscv/insns/xperm_n.h
@@ -1,2 +1,2 @@
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(sext_xlen(xperm(RS1, RS2, 2, xlen)));
diff --git a/riscv/insns/xperm_w.h b/riscv/insns/xperm_w.h
index b02f4c6..78456c4 100644
--- a/riscv/insns/xperm_w.h
+++ b/riscv/insns/xperm_w.h
@@ -1,3 +1,3 @@
require_rv64;
-require_extension('B');
+require_extension(EXT_XBITMANIP);
WRITE_RD(xperm(RS1, RS2, 5, xlen));
diff --git a/riscv/processor.cc b/riscv/processor.cc
index a1d2809..fe0d70f 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -259,7 +259,9 @@ void processor_t::parse_isa_string(const char* str)
end++;
auto ext_str = std::string(ext, end - ext);
- if (ext_str != "dummy")
+ if (ext_str == "bitmanip")
+ extension_table[EXT_XBITMANIP] = true;
+ else if (ext_str != "dummy")
register_extension(find_extension(ext_str.c_str())());
p = end;
diff --git a/riscv/processor.h b/riscv/processor.h
index b80ddad..425cf57 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -253,6 +253,7 @@ typedef enum {
EXT_SVNAPOT,
EXT_SVPBMT,
EXT_SVINVAL,
+ EXT_XBITMANIP,
} isa_extension_t;
typedef enum {