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author | Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> | 2022-10-10 15:01:32 +0300 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2022-10-14 12:10:36 -0700 |
commit | 60c0c86c288d14c81177e6f56aa5c6b77e40fbec (patch) | |
tree | 48f32740d88395d67689d51bab21b73f1fb0a5e1 /riscv | |
parent | e2e66015af4b5fce4bc958e70398f1fb7af7bcd9 (diff) | |
download | spike-60c0c86c288d14c81177e6f56aa5c6b77e40fbec.zip spike-60c0c86c288d14c81177e6f56aa5c6b77e40fbec.tar.gz spike-60c0c86c288d14c81177e6f56aa5c6b77e40fbec.tar.bz2 |
Report error if an unsupported memory configuration is detected
Diffstat (limited to 'riscv')
-rw-r--r-- | riscv/cfg.h | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/riscv/cfg.h b/riscv/cfg.h index 6369bd8..13dcf3a 100644 --- a/riscv/cfg.h +++ b/riscv/cfg.h @@ -32,18 +32,22 @@ private: class mem_cfg_t { public: - mem_cfg_t(reg_t base, reg_t size) - : base(base), size(size) - { - // The truth of these assertions should be ensured by whatever is creating + static bool check_if_supported(reg_t base, reg_t size) { + // The truth of these conditions should be ensured by whatever is creating // the regions in the first place, but we have them here to make sure that // we can't end up describing memory regions that don't make sense. They // ask that the page size is a multiple of the minimum page size, that the // page is aligned to the minimum page size, that the page is non-empty and // that the top address is still representable in a reg_t. - assert((size % PGSIZE == 0) && + return (size % PGSIZE == 0) && (base % PGSIZE == 0) && - (base + size > base)); + (base + size > base); + } + + mem_cfg_t(reg_t base, reg_t size) + : base(base), size(size) + { + assert(mem_cfg_t::check_if_supported(base, size)); } reg_t base; |