rvv: make v[sl]1r respect vstart

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>

2 files changed, 2 insertions, 2 deletions

diff --git a/riscv/insns/vl1r_v.h b/riscv/insns/vl1r_v.h
index 61e8765..9289634 100644
--- a/riscv/insns/vl1r_v.h
+++ b/riscv/insns/vl1r_v.h
@@ -2,7 +2,7 @@
 require_vector_novtype(true);
 const reg_t baseAddr = RS1;
 const reg_t vd = insn.rd();
-for (reg_t i = 0; i < P.VU.vlenb; ++i) {
+for (reg_t i = P.VU.vstart; i < P.VU.vlenb; ++i) {
   auto val = MMU.load_uint8(baseAddr + i);
   P.VU.elt<uint8_t>(vd, i, true) = val;
 }
diff --git a/riscv/insns/vs1r_v.h b/riscv/insns/vs1r_v.h
index 20dcece..5ccbd5f 100644
--- a/riscv/insns/vs1r_v.h
+++ b/riscv/insns/vs1r_v.h
@@ -2,7 +2,7 @@
 require_vector_novtype(true);
 const reg_t baseAddr = RS1;
 const reg_t vs3 = insn.rd();
-for (reg_t i = 0; i < P.VU.vlenb; ++i) {
+for (reg_t i = P.VU.vstart; i < P.VU.vlenb; ++i) {
   auto val = P.VU.elt<uint8_t>(vs3, i);
   MMU.store_uint8(baseAddr + i, val);
 }