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authorScott Johnson <scott.johnson@arilinc.com>2021-09-22 14:14:55 -0700
committerScott Johnson <scott.johnson@arilinc.com>2021-09-26 17:17:52 -0700
commit428c2aa1f074e8280fb9fc799e38c7289abc7c74 (patch)
treea74be16c535a7e8ee419879416cf8ab3059a8618 /riscv
parent7c17f36fece0f6be99e07fa52fcdf55ab3434458 (diff)
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Convert tdata2 to csr_t
Diffstat (limited to 'riscv')
-rw-r--r--riscv/csrs.cc22
-rw-r--r--riscv/csrs.h13
-rw-r--r--riscv/processor.cc10
-rw-r--r--riscv/processor.h4
4 files changed, 38 insertions, 11 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc
index 620e282..479dd27 100644
--- a/riscv/csrs.cc
+++ b/riscv/csrs.cc
@@ -1014,3 +1014,25 @@ bool tdata1_csr_t::unlogged_write(const reg_t val) noexcept {
proc->trigger_updated();
return true;
}
+
+
+tdata2_csr_t::tdata2_csr_t(processor_t* const proc, const reg_t addr, const size_t count):
+ csr_t(proc, addr),
+ vals(count, 0) {
+}
+
+reg_t tdata2_csr_t::read() const noexcept {
+ return read(state->tselect->read());
+}
+
+reg_t tdata2_csr_t::read(const size_t idx) const noexcept {
+ return vals[idx];
+}
+
+bool tdata2_csr_t::unlogged_write(const reg_t val) noexcept {
+ if (state->mcontrol[state->tselect->read()].dmode && !state->debug_mode) {
+ return false;
+ }
+ vals[state->tselect->read()] = val;
+ return true;
+}
diff --git a/riscv/csrs.h b/riscv/csrs.h
index f130d17..058fb42 100644
--- a/riscv/csrs.h
+++ b/riscv/csrs.h
@@ -516,5 +516,18 @@ class tdata1_csr_t: public csr_t {
virtual bool unlogged_write(const reg_t val) noexcept override;
};
+class tdata2_csr_t: public csr_t {
+ public:
+ tdata2_csr_t(processor_t* const proc, const reg_t addr, const size_t count);
+ virtual reg_t read() const noexcept override;
+ reg_t read(const size_t idx) const noexcept;
+ protected:
+ virtual bool unlogged_write(const reg_t val) noexcept override;
+ private:
+ std::vector<reg_t> vals;
+};
+
+typedef std::shared_ptr<tdata2_csr_t> tdata2_csr_t_p;
+
#endif
diff --git a/riscv/processor.cc b/riscv/processor.cc
index fafe355..e32acda 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -507,7 +507,7 @@ void state_t::reset(processor_t* const proc, reg_t max_isa)
item.type = 2;
csrmap[CSR_TDATA1] = std::make_shared<tdata1_csr_t>(proc, CSR_TDATA1);
- memset(this->tdata2, 0, sizeof(this->tdata2));
+ csrmap[CSR_TDATA2] = tdata2 = std::make_shared<tdata2_csr_t>(proc, CSR_TDATA2, num_triggers);
debug_mode = false;
single_step = STEP_NONE;
@@ -994,12 +994,6 @@ void processor_t::set_csr(int which, reg_t val)
VU.vxsat = (val & VCSR_VXSAT) >> VCSR_VXSAT_SHIFT;
VU.vxrm = (val & VCSR_VXRM) >> VCSR_VXRM_SHIFT;
break;
- case CSR_TDATA2:
- if (state.mcontrol[state.tselect->read()].dmode && !state.debug_mode) {
- break;
- }
- state.tdata2[state.tselect->read()] = val;
- break;
case CSR_DCSR:
state.dcsr.prv = get_field(val, DCSR_PRV);
state.dcsr.step = get_field(val, DCSR_STEP);
@@ -1062,7 +1056,6 @@ void processor_t::set_csr(int which, reg_t val)
LOG_CSR(CSR_VXRM);
break;
- case CSR_TDATA2:
case CSR_DCSR:
case CSR_DPC:
case CSR_DSCRATCH0:
@@ -1129,7 +1122,6 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek)
case CSR_MIMPID: ret(0);
case CSR_MVENDORID: ret(0);
case CSR_MHARTID: ret(id);
- case CSR_TDATA2: ret(state.tdata2[state.tselect->read()]);
case CSR_TDATA3: ret(0);
case CSR_DCSR:
{
diff --git a/riscv/processor.h b/riscv/processor.h
index c636c64..b2aadf5 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -206,7 +206,7 @@ struct state_t
dcsr_t dcsr;
csr_t_p tselect;
mcontrol_t mcontrol[num_triggers];
- reg_t tdata2[num_triggers];
+ tdata2_csr_t_p tdata2;
bool debug_mode;
static const int max_pmp = 16;
@@ -409,7 +409,7 @@ public:
value &= 0xffffffff;
}
- auto tdata2 = state.tdata2[i];
+ auto tdata2 = state.tdata2->read(i);
switch (state.mcontrol[i].match) {
case MATCH_EQUAL:
if (value != tdata2)