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authorChih-Min Chao <chihmin.chao@sifive.com>2019-11-04 20:32:56 -0800
committerChih-Min Chao <chihmin.chao@sifive.com>2019-11-11 19:02:35 -0800
commit32be2f9bc5b46cf4fed0ba2b850ca53fa64bdb8f (patch)
treee1014644666e8d1a146929d46dce9e3743f72ccc /riscv
parent4808f84a1833de2bbd87a92355f75991c4697312 (diff)
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rvv: fix reg checking for vmadc/vmsbc
remove unecessary checking Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv')
-rw-r--r--riscv/insns/vmadc_vim.h1
-rw-r--r--riscv/insns/vmadc_vvm.h1
-rw-r--r--riscv/insns/vmadc_vxm.h1
-rw-r--r--riscv/insns/vmsbc_vvm.h1
-rw-r--r--riscv/insns/vmsbc_vxm.h1
5 files changed, 0 insertions, 5 deletions
diff --git a/riscv/insns/vmadc_vim.h b/riscv/insns/vmadc_vim.h
index fd79089..a8185d1 100644
--- a/riscv/insns/vmadc_vim.h
+++ b/riscv/insns/vmadc_vim.h
@@ -1,5 +1,4 @@
// vmadc.vim vd, vs2, simm5
-require(!(insn.rd() == 0 && P.VU.vlmul > 1));
VI_XI_LOOP_CARRY
({
auto v0 = P.VU.elt<uint64_t>(0, midx);
diff --git a/riscv/insns/vmadc_vvm.h b/riscv/insns/vmadc_vvm.h
index 82042ca..8d58658 100644
--- a/riscv/insns/vmadc_vvm.h
+++ b/riscv/insns/vmadc_vvm.h
@@ -1,5 +1,4 @@
// vmadc.vvm vd, vs2, rs1
-require(!(insn.rd() == 0 && P.VU.vlmul > 1));
VI_VV_LOOP_CARRY
({
auto v0 = P.VU.elt<uint64_t>(0, midx);
diff --git a/riscv/insns/vmadc_vxm.h b/riscv/insns/vmadc_vxm.h
index 8f26584..0b6273a 100644
--- a/riscv/insns/vmadc_vxm.h
+++ b/riscv/insns/vmadc_vxm.h
@@ -1,5 +1,4 @@
// vadc.vx vd, vs2, rs1
-require(!(insn.rd() == 0 && P.VU.vlmul > 1));
VI_XI_LOOP_CARRY
({
auto v0 = P.VU.elt<uint64_t>(0, midx);
diff --git a/riscv/insns/vmsbc_vvm.h b/riscv/insns/vmsbc_vvm.h
index 3804ba8..f4ce6f4 100644
--- a/riscv/insns/vmsbc_vvm.h
+++ b/riscv/insns/vmsbc_vvm.h
@@ -1,5 +1,4 @@
// vmsbc.vvm vd, vs2, rs1
-require(!(insn.rd() == 0 && P.VU.vlmul > 1));
VI_VV_LOOP_CARRY
({
auto v0 = P.VU.elt<uint64_t>(0, midx);
diff --git a/riscv/insns/vmsbc_vxm.h b/riscv/insns/vmsbc_vxm.h
index d5332f5..aec4409 100644
--- a/riscv/insns/vmsbc_vxm.h
+++ b/riscv/insns/vmsbc_vxm.h
@@ -1,5 +1,4 @@
// vmsbc.vxm vd, vs2, rs1
-require(!(insn.rd() == 0 && P.VU.vlmul > 1));
VI_XI_LOOP_CARRY
({
auto &v0 = P.VU.elt<uint64_t>(0, midx);