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| author | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-11-11 00:02:01 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-11-11 00:02:01 -0800 |
| commit | 8a5c0e51c3fe386cf2cf4f40d1cb103d3a9f95fd (patch) | |
| tree | 8bbffc264327ae4a4c9853ce2394ee433cbfd4ff /riscv/trap.h | |
| parent | 069c07f440ac207a3bbe71f79c2834a9f0b919e5 (diff) | |
| download | spike-8a5c0e51c3fe386cf2cf4f40d1cb103d3a9f95fd.zip spike-8a5c0e51c3fe386cf2cf4f40d1cb103d3a9f95fd.tar.gz spike-8a5c0e51c3fe386cf2cf4f40d1cb103d3a9f95fd.tar.bz2 | |
Changed supervisor mode
- initial PC is 0x2000
- PCRs renumbered
- clearing IPIs now requires a write to a different PCR
- IRQs are each given their own cause #
Diffstat (limited to 'riscv/trap.h')
| -rw-r--r-- | riscv/trap.h | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/riscv/trap.h b/riscv/trap.h index ad5491a..8e43c2c 100644 --- a/riscv/trap.h +++ b/riscv/trap.h @@ -7,7 +7,7 @@ DECLARE_TRAP(illegal_instruction), \ DECLARE_TRAP(privileged_instruction), \ DECLARE_TRAP(fp_disabled), \ - DECLARE_TRAP(interrupt), \ + DECLARE_TRAP(reserved0), \ DECLARE_TRAP(syscall), \ DECLARE_TRAP(breakpoint), \ DECLARE_TRAP(load_address_misaligned), \ @@ -18,16 +18,14 @@ DECLARE_TRAP(vector_bank), \ DECLARE_TRAP(vector_illegal_instruction), \ DECLARE_TRAP(reserved1), \ - DECLARE_TRAP(reserved2), \ - DECLARE_TRAP(reserved3), \ - DECLARE_TRAP(int0), \ - DECLARE_TRAP(int1), \ - DECLARE_TRAP(int2), \ - DECLARE_TRAP(int3), \ - DECLARE_TRAP(int4), \ - DECLARE_TRAP(int5), \ - DECLARE_TRAP(int6), \ - DECLARE_TRAP(int7), \ + DECLARE_TRAP(irq0), \ + DECLARE_TRAP(irq1), \ + DECLARE_TRAP(irq2), \ + DECLARE_TRAP(irq3), \ + DECLARE_TRAP(irq4), \ + DECLARE_TRAP(irq5), \ + DECLARE_TRAP(irq6), \ + DECLARE_TRAP(irq7), \ #define DECLARE_TRAP(x) trap_##x enum trap_t |