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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-08-03 00:06:39 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-08-03 21:57:26 -0700 |
| commit | 7775c6fb7cc1b29bf529fee9fb900cef513222c1 (patch) | |
| tree | e5ff08c8b1b55aaa3b347532b80145e7875c9099 /riscv/trap.h | |
| parent | f5e4f0cf329c13a9dea4bbc36c535572186e9c41 (diff) | |
| download | spike-7775c6fb7cc1b29bf529fee9fb900cef513222c1.zip spike-7775c6fb7cc1b29bf529fee9fb900cef513222c1.tar.gz spike-7775c6fb7cc1b29bf529fee9fb900cef513222c1.tar.bz2 | |
op: hyperviosr: fix exception code and name
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/trap.h')
| -rw-r--r-- | riscv/trap.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/trap.h b/riscv/trap.h index 824af6f..4431d8a 100644 --- a/riscv/trap.h +++ b/riscv/trap.h @@ -82,7 +82,7 @@ DECLARE_MEM_TRAP(CAUSE_LOAD_ACCESS, load_access_fault) DECLARE_MEM_TRAP(CAUSE_STORE_ACCESS, store_access_fault) DECLARE_TRAP(CAUSE_USER_ECALL, user_ecall) DECLARE_TRAP(CAUSE_SUPERVISOR_ECALL, supervisor_ecall) -DECLARE_TRAP(CAUSE_HYPERVISOR_ECALL, hypervisor_ecall) +DECLARE_TRAP(CAUSE_VIRTUAL_SUPERVISOR_ECALL, virtual_supervisor_ecall) DECLARE_TRAP(CAUSE_MACHINE_ECALL, machine_ecall) DECLARE_MEM_TRAP(CAUSE_FETCH_PAGE_FAULT, instruction_page_fault) DECLARE_MEM_TRAP(CAUSE_LOAD_PAGE_FAULT, load_page_fault) |