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author | Andrew Waterman <andrew@sifive.com> | 2019-11-13 05:22:18 -0800 |
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committer | GitHub <noreply@github.com> | 2019-11-13 05:22:18 -0800 |
commit | 2704790df5d16868571bacf4c521df4bac87f452 (patch) | |
tree | 5b80d59e0eb989d491f2c7db46a1a960e8236e67 /riscv/sim.h | |
parent | ff81dea8593c6e51b45e7bed230a2cafd56e4caf (diff) | |
parent | 86857aa3511d0a3bb1d28f8a6213013382545f77 (diff) | |
download | spike-2704790df5d16868571bacf4c521df4bac87f452.zip spike-2704790df5d16868571bacf4c521df4bac87f452.tar.gz spike-2704790df5d16868571bacf4c521df4bac87f452.tar.bz2 |
Merge pull request #356 from riscv/priv-flag
Add --priv command-line option to set which privilege modes are available
Diffstat (limited to 'riscv/sim.h')
-rw-r--r-- | riscv/sim.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/riscv/sim.h b/riscv/sim.h index 0720ce4..3b7e25c 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -21,7 +21,8 @@ class remote_bitbang_t; class sim_t : public htif_t, public simif_t { public: - sim_t(const char* isa, const char* varch, size_t _nprocs, bool halted, + sim_t(const char* isa, const char* priv, const char* varch, size_t _nprocs, + bool halted, reg_t start_pc, std::vector<std::pair<reg_t, mem_t*>> mems, std::vector<std::pair<reg_t, abstract_device_t*>> plugin_devices, const std::vector<std::string>& args, const std::vector<int> hartids, |