diff options
author | Tim Newsome <tim@sifive.com> | 2016-03-07 15:44:20 -0800 |
---|---|---|
committer | Tim Newsome <tim@sifive.com> | 2016-05-23 12:12:09 -0700 |
commit | d1ba8b559309c6e3dd47c18674b199bd3cf6e8d9 (patch) | |
tree | 8b314495f8c6c25cba373596c60f2b9ee0bb554c /riscv/sim.h | |
parent | 206b89737c562a6882a729ae88cfe0ac75862c3c (diff) | |
download | spike-d1ba8b559309c6e3dd47c18674b199bd3cf6e8d9.zip spike-d1ba8b559309c6e3dd47c18674b199bd3cf6e8d9.tar.gz spike-d1ba8b559309c6e3dd47c18674b199bd3cf6e8d9.tar.bz2 |
gdb can now read spike memory.
The endianness is wrong, but I think it might be that gdb doesn't have
it right. Need to investigate what architecture gdb thinks it's
debugging.
Diffstat (limited to 'riscv/sim.h')
-rw-r--r-- | riscv/sim.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/sim.h b/riscv/sim.h index cac1daf..7ee4020 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -92,6 +92,7 @@ private: friend class htif_isasim_t; friend class processor_t; friend class mmu_t; + friend class gdbserver_t; }; extern volatile bool ctrlc_pressed; |