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| author | Tim Newsome <tim@sifive.com> | 2019-05-14 11:02:15 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-14 11:02:15 -0700 |
| commit | 8ac902f6ff877e976af434bfe8fa8445930174a1 (patch) | |
| tree | c140d3661f447fc2e61f15ebeaa1956b1a358774 /riscv/sim.h | |
| parent | 8925aec9dc03d590e7cf8c45314a37e50ebfba02 (diff) | |
| download | spike-8ac902f6ff877e976af434bfe8fa8445930174a1.zip spike-8ac902f6ff877e976af434bfe8fa8445930174a1.tar.gz spike-8ac902f6ff877e976af434bfe8fa8445930174a1.tar.bz2 | |
Clean up debug module options. (#299)
* Clean up debug module options.
1. Instead of passing each one a few levels deep, create
debug_module_config_t which contains them all.
2. Rename all those command line options so they start with --dm for
debug module.
3. Add --dm-no-halt-groups to disable halt group support.
* Update changelog.
Diffstat (limited to 'riscv/sim.h')
| -rw-r--r-- | riscv/sim.h | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/riscv/sim.h b/riscv/sim.h index d1c7a37..6b9fad5 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -24,9 +24,7 @@ public: sim_t(const char* isa, size_t _nprocs, bool halted, reg_t start_pc, std::vector<std::pair<reg_t, mem_t*>> mems, const std::vector<std::string>& args, const std::vector<int> hartids, - unsigned progsize, unsigned max_bus_master_bits, - bool require_authentication, suseconds_t abstract_delay_usec, - bool support_hasel, bool support_abstract_csr_access); + const debug_module_config_t &dm_config); ~sim_t(); // run the simulation to completion |