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author | Andrew Waterman <andrew@sifive.com> | 2020-03-29 18:11:49 -0700 |
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committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-04-05 23:08:16 -0700 |
commit | e43850d5cd2cc262f2f9157c579c12ea20f03ada (patch) | |
tree | 6057769a66edc7e9675f5115ccc78b925dfaa9f3 /riscv/sim.cc | |
parent | 5fd0cf08eb3470deeccef9f43e4819fffb252aa5 (diff) | |
download | spike-e43850d5cd2cc262f2f9157c579c12ea20f03ada.zip spike-e43850d5cd2cc262f2f9157c579c12ea20f03ada.tar.gz spike-e43850d5cd2cc262f2f9157c579c12ea20f03ada.tar.bz2 |
Fix debug segfault by partially reverting #409
Diffstat (limited to 'riscv/sim.cc')
-rw-r--r-- | riscv/sim.cc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc index 3a0ad73..0b29720 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -35,6 +35,7 @@ sim_t::sim_t(const char* isa, const char* priv, const char* varch, const debug_module_config_t &dm_config, const char *log_path) : htif_t(args), mems(mems), plugin_devices(plugin_devices), + procs(std::max(nprocs, size_t(1))), initrd_start(initrd_start), initrd_end(initrd_end), start_pc(start_pc), log_file(log_path), current_step(0), current_proc(0), debug(false), histogram_enabled(false), @@ -63,8 +64,8 @@ sim_t::sim_t(const char* isa, const char* priv, const char* varch, for (size_t i = 0; i < nprocs; i++) { int hart_id = hartids.empty() ? i : hartids[i]; - procs.push_back(new processor_t (isa, priv, varch, this, - hart_id, halted, log_file.get())); + procs[i] = new processor_t(isa, priv, varch, this, hart_id, halted, + log_file.get()); } clint.reset(new clint_t(procs, CPU_HZ / INSNS_PER_RTC_TICK, real_time_clint)); |