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| author | Andrew Waterman <andrew@sifive.com> | 2017-05-01 16:44:47 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-05-01 16:44:47 -0700 |
| commit | 63c98b41ae2d36808ebbb57e7f8e871ba247d444 (patch) | |
| tree | 3649d1d9fedb439aecfd8e98cece60f98ca30357 /riscv/sim.cc | |
| parent | 75f2a05df9cdff6f3faba748065b3184b9f01b01 (diff) | |
| download | spike-63c98b41ae2d36808ebbb57e7f8e871ba247d444.zip spike-63c98b41ae2d36808ebbb57e7f8e871ba247d444.tar.gz spike-63c98b41ae2d36808ebbb57e7f8e871ba247d444.tar.bz2 | |
Fix segfault when accessing bad memory addresses
Diffstat (limited to 'riscv/sim.cc')
| -rw-r--r-- | riscv/sim.cc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc index ebf94b6..edf0819 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -317,8 +317,9 @@ void sim_t::make_dtb() char* sim_t::addr_to_mem(reg_t addr) { auto desc = bus.find_device(addr); - if (auto mem = dynamic_cast<mem_t*>(desc.device)) - return mem->contents() + (addr - desc.base); + if (auto mem = dynamic_cast<mem_t*>(desc.second)) + if (addr - desc.first < mem->size()) + return mem->contents() + (addr - desc.first); return NULL; } |