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| author | Rupert Swarbrick <rswarbrick@gmail.com> | 2022-04-11 10:47:50 +0100 |
|---|---|---|
| committer | Rupert Swarbrick <rswarbrick@lowrisc.org> | 2022-04-12 11:10:35 +0100 |
| commit | e4aaed1b7b08998a6b6aefa34f7c575e292dde62 (patch) | |
| tree | b3c521ba268aa52adfae14647c469ce15127bb8e /riscv/sim.cc | |
| parent | 0d90f75dc4b5e28b2e3b3f35debaae1169c69d98 (diff) | |
| download | spike-e4aaed1b7b08998a6b6aefa34f7c575e292dde62.zip spike-e4aaed1b7b08998a6b6aefa34f7c575e292dde62.tar.gz spike-e4aaed1b7b08998a6b6aefa34f7c575e292dde62.tar.bz2 | |
Move the "default hartids" logic from sim.cc into spike.cc
This moves another part of the "configuration" out of the generic
sim.cc code.
Diffstat (limited to 'riscv/sim.cc')
| -rw-r--r-- | riscv/sim.cc | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc index 4e3dd40..d285183 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -63,6 +63,8 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl remote_bitbang(NULL), debug_module(this, dm_config) { + assert(hartids.size() == cfg->nprocs()); + signal(SIGINT, &handle_signal); sout_.rdbuf(std::cerr.rdbuf()); // debug output goes to stderr by default @@ -77,17 +79,8 @@ sim_t::sim_t(const cfg_t *cfg, const char* varch, bool halted, bool real_time_cl debug_mmu = new mmu_t(this, NULL); - if (! (hartids.empty() || hartids.size() == nprocs())) { - std::cerr << "Number of specified hartids (" - << hartids.size() - << ") doesn't match number of processors (" - << nprocs() << ").\n"; - exit(1); - } - for (size_t i = 0; i < nprocs(); i++) { - int hart_id = hartids.empty() ? i : hartids[i]; - procs[i] = new processor_t(&isa, varch, this, hart_id, halted, + procs[i] = new processor_t(&isa, varch, this, hartids[i], halted, log_file.get(), sout_); } |