diff options
author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-11-15 22:11:34 -0800 |
---|---|---|
committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-11-15 22:26:31 -0800 |
commit | b4aa36c4ba326b6ba143b0b0a843e8c72292f69b (patch) | |
tree | dc3c1deef4c3916f1b0fae494618580ce1e540db /riscv/sim.cc | |
parent | 0ca970dce354cff6ad68edbf27f0559d02be5915 (diff) | |
download | spike-b4aa36c4ba326b6ba143b0b0a843e8c72292f69b.zip spike-b4aa36c4ba326b6ba143b0b0a843e8c72292f69b.tar.gz spike-b4aa36c4ba326b6ba143b0b0a843e8c72292f69b.tar.bz2 |
dts: config pmp attribute by each core's setting
The original implementation only uses the value in first core and apply it
to other core. The patch makes the configuration hetergeneous for differenct
cores.
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/sim.cc')
-rw-r--r-- | riscv/sim.cc | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc index 13329f4..20895d6 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -83,26 +83,17 @@ sim_t::sim_t(const char* isa, const char* priv, const char* varch, make_dtb(); + void *fdt = (void *)dtb.c_str(); //handle clic clint.reset(new clint_t(procs, CPU_HZ / INSNS_PER_RTC_TICK, real_time_clint)); reg_t clint_base; - if (fdt_parse_clint((void *)dtb.c_str(), &clint_base, "riscv,clint0")) { + if (fdt_parse_clint(fdt, &clint_base, "riscv,clint0")) { bus.add_device(CLINT_BASE, clint.get()); } else { bus.add_device(clint_base, clint.get()); } - //handle pmp - for (size_t i = 0; i < nprocs; i++) { - reg_t pmp_num = 0, pmp_granularity = 0; - fdt_parse_pmp_num((void *)dtb.c_str(), &pmp_num, "riscv"); - fdt_parse_pmp_alignment((void *)dtb.c_str(), &pmp_granularity, "riscv"); - - procs[i]->set_pmp_num(pmp_num); - procs[i]->set_pmp_granularity(pmp_granularity); - } - - void *fdt = (void *)dtb.c_str(); + //per core attribute int cpu_offset = 0, rc; size_t cpu_idx = 0; cpu_offset = fdt_get_offset(fdt, "/cpus"); @@ -115,6 +106,16 @@ sim_t::sim_t(const char* isa, const char* priv, const char* varch, if (cpu_idx >= nprocs) break; + //handle pmp + reg_t pmp_num = 0, pmp_granularity = 0; + if (fdt_parse_pmp_num(fdt, cpu_offset, &pmp_num) == 0) { + procs[cpu_idx]->set_pmp_num(pmp_num); + } + + if (fdt_parse_pmp_alignment(fdt, cpu_offset, &pmp_granularity) == 0) { + procs[cpu_idx]->set_pmp_granularity(pmp_granularity); + } + //handle mmu-type char mmu_type[256] = ""; rc = fdt_parse_mmu_type(fdt, cpu_offset, mmu_type); |