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author | Andrew Waterman <andrew@sifive.com> | 2022-09-22 17:34:33 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2022-10-04 15:40:01 -0700 |
commit | ce69fb5db97ecf240336b7826dd9dddeb32e5dca (patch) | |
tree | f78647d0eafa9abc414f5ded2a3663c7506cfd9c /riscv/rom.cc | |
parent | a51e44ed228e48fc1dbf24ec7dc23cbd61a7874a (diff) | |
download | spike-ce69fb5db97ecf240336b7826dd9dddeb32e5dca.zip spike-ce69fb5db97ecf240336b7826dd9dddeb32e5dca.tar.gz spike-ce69fb5db97ecf240336b7826dd9dddeb32e5dca.tar.bz2 |
Suppress most unused variable warnings
Diffstat (limited to 'riscv/rom.cc')
-rw-r--r-- | riscv/rom.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/rom.cc b/riscv/rom.cc index b852862..2d10e91 100644 --- a/riscv/rom.cc +++ b/riscv/rom.cc @@ -13,7 +13,7 @@ bool rom_device_t::load(reg_t addr, size_t len, uint8_t* bytes) return true; } -bool rom_device_t::store(reg_t addr, size_t len, const uint8_t* bytes) +bool rom_device_t::store(reg_t UNUSED addr, size_t UNUSED len, const uint8_t UNUSED *bytes) { return false; } |