diff options
| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-07-15 03:39:00 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-07-29 21:38:43 -0700 |
| commit | effb92a5ecca543e27bb0ae3d7c42eee34d4ddf4 (patch) | |
| tree | 744bd308e8c7dd38ea31c5203c4fffa78483b648 /riscv/riscv.mk.in | |
| parent | 3075210b4948fb1b0a6772384c6e2ea103d75511 (diff) | |
| download | spike-effb92a5ecca543e27bb0ae3d7c42eee34d4ddf4.zip spike-effb92a5ecca543e27bb0ae3d7c42eee34d4ddf4.tar.gz spike-effb92a5ecca543e27bb0ae3d7c42eee34d4ddf4.tar.bz2 | |
rvv: add new whole reg load/store instructions
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/riscv.mk.in')
| -rw-r--r-- | riscv/riscv.mk.in | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 0ac77f2..ad1c886 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -709,6 +709,22 @@ riscv_insn_ext_v_ldst = \ vle16ff_v \ vle32ff_v \ vle64ff_v \ + vl1re8_v \ + vl2re8_v \ + vl4re8_v \ + vl8re8_v \ + vl1re16_v \ + vl2re16_v \ + vl4re16_v \ + vl8re16_v \ + vl1re32_v \ + vl2re32_v \ + vl4re32_v \ + vl8re32_v \ + vl1re64_v \ + vl2re64_v \ + vl4re64_v \ + vl8re64_v \ vse8_v \ vse16_v \ vse32_v \ @@ -725,8 +741,10 @@ riscv_insn_ext_v_ldst = \ vsuxei16_v \ vsuxei32_v \ vsuxei64_v \ - vl1r_v \ vs1r_v \ + vs2r_v \ + vs4r_v \ + vs8r_v \ riscv_insn_ext_v_ctrl = \ vsetvli \ |