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| author | Chih-Min Chao <48193236+chihminchao@users.noreply.github.com> | 2020-12-03 09:57:31 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-12-02 17:57:31 -0800 |
| commit | 21458a27101aeda7abd498f4c48a2192b0fef62f (patch) | |
| tree | 0490bf7b6e44a9e6ee0bb2e0326cf371c316e942 /riscv/riscv.mk.in | |
| parent | 654480447f86dfcce9eb6113c635ba4fbd84bb25 (diff) | |
| download | spike-21458a27101aeda7abd498f4c48a2192b0fef62f.zip spike-21458a27101aeda7abd498f4c48a2192b0fef62f.tar.gz spike-21458a27101aeda7abd498f4c48a2192b0fef62f.tar.bz2 | |
rvv: index load/store have benn separated into ordered and unordered parts (#611)
ref:
https://github.com/riscv/riscv-v-spec/commit/511d0b84a3848de437fd01990d078feaa2871b11
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/riscv.mk.in')
| -rw-r--r-- | riscv/riscv.mk.in | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 9afbc14..62d537d 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -799,14 +799,18 @@ riscv_insn_ext_v_ldst = \ vle16_v \ vle32_v \ vle64_v \ + vloxei8_v \ + vloxei16_v \ + vloxei32_v \ + vloxei64_v \ vlse8_v \ vlse16_v \ vlse32_v \ vlse64_v \ - vlxei8_v \ - vlxei16_v \ - vlxei32_v \ - vlxei64_v \ + vluxei8_v \ + vluxei16_v \ + vluxei32_v \ + vluxei64_v \ vle8ff_v \ vle16ff_v \ vle32ff_v \ @@ -832,13 +836,13 @@ riscv_insn_ext_v_ldst = \ vse32_v \ vse64_v \ vsse8_v \ + vsoxei8_v \ + vsoxei16_v \ + vsoxei32_v \ + vsoxei64_v \ vsse16_v \ vsse32_v \ vsse64_v \ - vsxei8_v \ - vsxei16_v \ - vsxei32_v \ - vsxei64_v \ vsuxei8_v \ vsuxei16_v \ vsuxei32_v \ |