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| author | Tim Newsome <tim@sifive.com> | 2017-02-06 19:17:23 -0800 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2017-02-06 19:17:23 -0800 |
| commit | 4695be7cea868b34082787d5728c35577d0c05d1 (patch) | |
| tree | b9d730b3955e924e0b198ccc6c7d5014d06817f9 /riscv/riscv.mk.in | |
| parent | 9be157042081e894e6c12dc96449cf865469bcfe (diff) | |
| download | spike-4695be7cea868b34082787d5728c35577d0c05d1.zip spike-4695be7cea868b34082787d5728c35577d0c05d1.tar.gz spike-4695be7cea868b34082787d5728c35577d0c05d1.tar.bz2 | |
Refactor remote bitbang code.
Diffstat (limited to 'riscv/riscv.mk.in')
| -rw-r--r-- | riscv/riscv.mk.in | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 695803b..6f12b84 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -25,6 +25,7 @@ riscv_hdrs = \ mulhi.h \ debug_module.h \ remote_bitbang.h \ + jtag_dtm.h \ riscv_precompiled_hdrs = \ insn_template.h \ @@ -47,6 +48,7 @@ riscv_srcs = \ rtc.cc \ debug_module.cc \ remote_bitbang.cc \ + jtag_dtm.cc \ $(riscv_gen_srcs) \ riscv_test_srcs = |